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Computer Engineering Information Systems Engineering Logic and Computation Visual Computing and Human-Centered Technology
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Algorithms and Complexity Artifact-based Computing and User Research Artificial Intelligence Techniques Automation Systems Business Informatics Compilers and Languages Computational Sustainability Computer Graphics Computer Vision Cyber-Physical Systems Data Science Databases and Artificial Intelligence Distributed Systems Embedded Computing Systems Formal Methods in Systems Engineering Human Computer Interaction Internet lnfrastructures Knowledge-Based Systems Machine Learning Parallel Computing Privacy Enhancing Technologies Security and Privacy Software Engineering Theory and Logic Virtual and Augmented Reality Visual Analytics

Embedded Computing Systems E191-02

  • A Research Unit of The Institute of Computer Engineering

The scope of our research and teaching activities at the Embedded Computing Systems unit ranges from dependable and power-efficient digital circuits to future generation computer architectures to networked embedded systems and fault-tolerant distributed systems in general.

Research Unit Embedded Computing Systems

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The scope of our research and teaching activities at the Embedded Computing Systems unit ranges from dependable and power-efficient digital circuits to future generation computer architectures to networked embedded systems and fault-tolerant distributed systems in general.

Nonwithstanding a clear focus on scientific research, the spectrum of our work ranges from formal-mathematical analysis to simulation-based experimental evaluation to prototype implementations. With respect to teaching, the ECS group is primarily responsible for related courses in the Bachelor’s and Master’s programs Technische Informatik (Computer Engineering).

The research Unit Embedded Computing Systems is part of the Institute of Computer Engineering.

Daniel Müller-Gritschneder
Daniel Müller-Gritschneder D. Müller-Gritschneder

Head of Research Unit
Univ.Prof. Dr. DI

Andreas Steininger
Andreas Steininger A. Steininger

Associate Professor
Ao.Univ.Prof. DI Dr.

Ulrich Schmid
Ulrich Schmid U. Schmid

Retired Professor
Univ.Prof.i.R. DI Dr.

Afsah Anjum
Afsah Anjum A. Anjum

PreDoc Researcher
MSc

Dylan Baumann
Dylan Baumann D. Baumann

PreDoc Researcher
DI / BSc

Florian Ferdinand Huemer
Florian Ferdinand Huemer F. Huemer

PostDoc Researcher
DI Dr. / BSc

Jefferson Parker Jones
Jefferson Parker Jones J. Jones

PreDoc Researcher
MSc

Johannes Kappes
Johannes Kappes J. Kappes

PreDoc Researcher
MSc

Yang Liu
Yang Liu Y. Liu

PreDoc Researcher

Daniel Schloms
Daniel Schloms D. Schloms

PreDoc Researcher
DI / BSc

Sebastian Michael Wiedemann
Sebastian Michael Wiedemann S. Wiedemann

PreDoc Researcher
DI / BSc

Edris Zaman Farsa
Edris Zaman Farsa E. Zaman Farsa

PreDoc Researcher
MSc

Thomas-Emanuel Juranek
Thomas-Emanuel Juranek T. Juranek

IT Services
BA

Elisabeth Sophie Kühnelt
Elisabeth Sophie Kühnelt E. Kühnelt

Office Services
MA

Markus Ferringer
Markus Ferringer M. Ferringer

Lecturer
DI Dr.

Jakob Lechner
Jakob Lechner J. Lechner

Lecturer
DI Dr.

Manfred Siegl
Manfred Siegl M. Siegl

Lecturer
DI Dr.

2025W

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2025

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2022

2021

2020

2019

2018

2017

  • Foreword / Steininger, A., Pawlak, A., & Stopjakova, V. (2017). Foreword. Journal of Circuits, Systems, and Computers, 26(08), Article 1702001. https://doi.org/10.1142/s0218126617020017
  • Optimal Greedy Algorithm for Many-Core Scheduling / Pathania, A., Venkataramani, V., Shafique, M., Mitra, T., & Henkel, J. (2017). Optimal Greedy Algorithm for Many-Core Scheduling. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36(6), 1054–1058. https://doi.org/10.1109/tcad.2016.2618880
  • Modeling the CMOS Inverter using Hybrid Systems / Maier, J. (2017). Modeling the CMOS Inverter using Hybrid Systems. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:3-10163
    Download: PDF (437 KB)
    Project: SIC (2013–2018)
  • QuAd: Design and Analysis of Quality-Area Optimal Low-Latency Approximate Adders / Hanif, M. A., Hafiz, R., Hasan, O., & Shafique, M. (2017). QuAd: Design and Analysis of Quality-Area Optimal Low-Latency Approximate Adders. In Proceedings of the 54th Annual Design Automation Conference 2017. 2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC’17), Austin, Texas, United States of America (the). ACM. https://doi.org/10.1145/3061639.3062306
  • Synthesis of Distributed Algorithms with Parameterized Threshold Guards / Lazić, M., Konnov, I., Widder, J., & Bloem, R. (2017). Synthesis of Distributed Algorithms with Parameterized Threshold Guards. In J. Aspnes, A. Bessani, P. Felber, & J. Leitao (Eds.), 21st International Conference on Principles of Distributed Systems (OPODIS 2017) (pp. 32:1-32:20). LIPIcs-Leibniz International Proceedings in Informatics. https://doi.org/10.4230/LIPIcs.OPODIS.2017.32
    Project: APALACHE (2016–2019)
  • The Byzantine Mind / Kuznets, R. (2017). The Byzantine Mind. Seminar Logic and Theoretical Computer Science, University of Bern (2017), Bern, Switzerland. http://hdl.handle.net/20.500.12708/86565
  • A Critical Charge Model for Estimating the SET and SEU Sensitivity: A Muller C-Element Case Study / Andjelkovic, M., Krstic, M., Kraemer, R., Veeravalli, V. S., & Steininger, A. (2017). A Critical Charge Model for Estimating the SET and SEU Sensitivity: A Muller C-Element Case Study. In Proceedings of the 26th IEEE Asian Test Symposium (ATS´17) (pp. 1–6). http://hdl.handle.net/20.500.12708/57265
  • Low-overhead Aging-aware Resource Management on Embedded GPUs / Lee, H., Shafique, M., & Al Faruque, M. A. (2017). Low-overhead Aging-aware Resource Management on Embedded GPUs. In Proceedings of the 54th Annual Design Automation Conference 2017. 2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC’17), Austin, Texas, United States of America (the). ACM. https://doi.org/10.1145/3061639.3062277
  • Statistical Error Analysis for Low Power Approximate Adders / Ayub, M. K., Hasan, O., & Shafique, M. (2017). Statistical Error Analysis for Low Power Approximate Adders. In Proceedings of the 54th Annual Design Automation Conference 2017. 2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC’17), Austin, Texas, United States of America (the). ACM. https://doi.org/10.1145/3061639.3062319
  • Measuring Metastability with Free-Running Clocks / Najvirt, R., Polzer, T., & Steininger, A. (2017). Measuring Metastability with Free-Running Clocks. In 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC). 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), San Diego, California, United States of America (the). IEEE Computer Society. https://doi.org/10.1109/async.2017.18
  • Metastability Tolerant Computing / Tarawneh, G., Függer, M., & Lenzen, C. (2017). Metastability Tolerant Computing. In 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC). 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), San Diego, California, United States of America (the). IEEE Computer Society. https://doi.org/10.1109/async.2017.9
  • Metastability-Aware Memory-Efficient Time-to-Digital Converters / Függer, M., Kinali, A., Lenzen, C., & Polzer, T. (2017). Metastability-Aware Memory-Efficient Time-to-Digital Converters. In 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC). 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), San Diego, California, United States of America (the). IEEE Computer Society. https://doi.org/10.1109/async.2017.12
  • A Self-Healing Framework for Building Resilient Cyber-Physical Systems / Ratasich, D., Höftberger, O., Isakovic, H., Shafique, M., & Grosu, R. (2017). A Self-Healing Framework for Building Resilient Cyber-Physical Systems. In 2017 IEEE 20th International Symposium on Real-Time Distributed Computing (ISORC). 20th IEEE International Symposium on Real-Time Computing (ISORC 2017), Toronto, Canada. IEEE. https://doi.org/10.1109/isorc.2017.7
  • Emerging Brain-Inspired Computing Trends: From Approximate Computing to Neural Processing / Shafique, M. (2017). Emerging Brain-Inspired Computing Trends: From Approximate Computing to Neural Processing. International Conference On Latest Trends in Electrical Engineering and Computing Technologies (INTELLECT’17), Karachi, Pakistan. http://hdl.handle.net/20.500.12708/86677
  • Enabling Extreme Energy-Efficiency through Brain-Inspired Computing Trends: From Approximate to Neural Processing / Shafique, M. (2017). Enabling Extreme Energy-Efficiency through Brain-Inspired Computing Trends: From Approximate to Neural Processing. 15th International Conference On Frontiers of Information Technology (FIT’17), Islamabad, Pakistan. http://hdl.handle.net/20.500.12708/86678
  • A short counterexample property for safety and liveness verification of fault-tolerant distributed algorithms / Konnov, I., Lazić, M., Veith, H., & Widder, J. (2017). A short counterexample property for safety and liveness verification of fault-tolerant distributed algorithms. In Proceedings of the 44th ACM SIGPLAN Symposium on Principles of Programming Languages. 44th ACM SIGPLAN Symposium on Principles of Programming Languages (POPL), Paris, France. ACM. https://doi.org/10.1145/3009837.3009860
    Project: APALACHE (2016–2019)
  • Secure Cyber-Physical Systems: Current trends, tools and open research problems / Chattopadhyay, A., Prakash, A., & Shafique, M. (2017). Secure Cyber-Physical Systems: Current trends, tools and open research problems. In Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017. 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE’17), Lausanne, Switzerland. IEEE. https://doi.org/10.23919/date.2017.7927154
  • CAnDy-TM: Comparative analysis of dynamic thermal management in many-cores using model checking / Bukhari, S. A. A., Lodhi, F. K., Hasan, O., Shafique, M., & Henkel, J. (2017). CAnDy-TM: Comparative analysis of dynamic thermal management in many-cores using model checking. In Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017. 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE’17), Lausanne, Switzerland. IEEE. https://doi.org/10.23919/date.2017.7927191
  • Scalable probabilistic power budgeting for many-cores / Pathania, A., Khdr, H., Shafique, M., Mitra, T., & Henkel, J. (2017). Scalable probabilistic power budgeting for many-cores. In Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017. 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE’17), Lausanne, Switzerland. IEEE. https://doi.org/10.23919/date.2017.7927108
  • Soft error-aware architectural exploration for designing reliability adaptive cache hierarchies in multi-cores / Subramaniyan, A., Rehman, S., Shafique, M., Kumar, A., & Henkel, J. (2017). Soft error-aware architectural exploration for designing reliability adaptive cache hierarchies in multi-cores. In Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017. 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE’17), Lausanne, Switzerland. IEEE. https://doi.org/10.23919/date.2017.7926955
  • Embracing approximate computing for energy-efficient motion estimation in high efficiency video coding / El-Harouni, W., Rehman, S., Prabakaran, B. S., Kumar, A., Hafiz, R., & Shafique, M. (2017). Embracing approximate computing for energy-efficient motion estimation in high efficiency video coding. In Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017. 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE’17), Lausanne, Switzerland. IEEE. https://doi.org/10.23919/date.2017.7927209
  • Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap / Shafique, M., Hafiz, R., Javed, M. U., Abbas, S., Sekanina, L., Vasicek, Z., & Mrazek, V. (2017). Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap. In 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI’17), Bochum, Germany. IEEE. https://doi.org/10.1109/isvlsi.2017.124
  • Measuring metastability using a time-to-digital converter / Polzer, T., Huemer, F., & Steininger, A. (2017). Measuring metastability using a time-to-digital converter. In 2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Dresden, Germany. IEEE Service Center. https://doi.org/10.1109/ddecs.2017.7934582
  • Robust Heterogeneous Computing for CPS / Shafique, M. (2017). Robust Heterogeneous Computing for CPS. CPS Summer School 2017, Porto Contr Ricerche, Italy. http://hdl.handle.net/20.500.12708/86575
  • Low-Power Computing and Emerging Trends / Shafique, M. (2017). Low-Power Computing and Emerging Trends. CPS Summer School 2017, Porto Contr Ricerche, Italy. http://hdl.handle.net/20.500.12708/86679
  • Cross-Layer Approximate Computing: From Circuits to Applications / Shafique, M. (2017). Cross-Layer Approximate Computing: From Circuits to Applications. Invited Talks at University of Twente, Twente, Netherlands (the). http://hdl.handle.net/20.500.12708/86683
  • Approximate Computing across the Hardware and Software Stacks / Shafique, M. (2017). Approximate Computing across the Hardware and Software Stacks. Invited Talks at TU Eindhoven, Eindhoven, Netherlands (the). http://hdl.handle.net/20.500.12708/86684
  • Application-Guided Power-Efficient Fault Tolerance for H.264 Context Adaptive Variable Length Coding / Shafique, M., Rehman, S., Kriebel, F., Khan, M. U. K., Zatt, B., Subramaniyan, A., Vizzotto, B. B., & Henkel, J. (2017). Application-Guided Power-Efficient Fault Tolerance for H.264 Context Adaptive Variable Length Coding. IEEE Transactions on Computers, 66(4), 560–574. https://doi.org/10.1109/tc.2016.2616313
  • Brief Announcement: Lower Bounds for Asymptotic Consensus in Dynamic Networks / Függer, M., Nowak, T., & Schwarz, M. (2017). Brief Announcement: Lower Bounds for Asymptotic Consensus in Dynamic Networks. In A. W. Richa (Ed.), 31st International Symposium on Distributed Computing (DISC 2017) (p. 3). Schloss Dagstuhl – Leibniz-Zentrum für Informatik. https://doi.org/10.4230/LIPIcs.DISC.2017.51
  • New transience bounds for max-plus linear systems / Charron-Bost, B., Függer, M., & Nowak, T. (2017). New transience bounds for max-plus linear systems. Discrete Applied Mathematics, 219, 83–99. https://doi.org/10.1016/j.dam.2016.11.003
  • Design Space Exploration and Run-Time Adaptation for Multicore Resource Management Under Performance and Power Constraints / Pagani, S., Shafique, M., & Henkel, J. (2017). Design Space Exploration and Run-Time Adaptation for Multicore Resource Management Under Performance and Power Constraints. In Handbook of Hardware/Software Codesign (pp. 301–332). Springer Science+Business Media. https://doi.org/10.1007/978-94-017-7267-9_11
  • Adroit Use of Dark Silicon for Power, Performance and Reliability Optimisation of NoCs / Bokhari, H., Shafique, M., Henkel, J., & Parameswaran, S. (2017). Adroit Use of Dark Silicon for Power, Performance and Reliability Optimisation of NoCs. In The Dark Side of Silicon (pp. 291–325). Springer International Publishing. https://doi.org/10.1007/978-3-319-31596-6_11
  • Thermal Safe Power: Efficient Thermal-Aware Power Budgeting for Manycore Systems in Dark Silicon / Pagani, S., Khdr, H., Chen, J.-J., Shafique, M., Li, M., & Henkel, J. (2017). Thermal Safe Power: Efficient Thermal-Aware Power Budgeting for Manycore Systems in Dark Silicon. In The Dark Side of Silicon (pp. 125–158). Springer International Publishing. https://doi.org/10.1007/978-3-319-31596-6_5
  • Setup for an Experimental Study of Radiation Effects in 65nm CMOS / Fritz, B., Veeravalli, V. S., Steininger, A., & Simek, V. (2017). Setup for an Experimental Study of Radiation Effects in 65nm CMOS. In 2017 Euromicro Conference on Digital System Design (DSD). 20th Euromicro Conference on Digital System Design, Wien, Austria. https://doi.org/10.1109/dsd.2017.60
  • A Model for the Metastability Delay of Sequential Elements / Polzer, T., & Steininger, A. (2017). A Model for the Metastability Delay of Sequential Elements. Journal of Circuits, Systems, and Computers, 26(08), 1740010. https://doi.org/10.1142/s0218126617400102
  • Probabilistic Error Analysis of Approximate Recursive Multipliers / Mazahir, S., Hasan, O., Hafiz, R., & Shafique, M. (2017). Probabilistic Error Analysis of Approximate Recursive Multipliers. IEEE Transactions on Computers, 66(11), 1982–1990. https://doi.org/10.1109/tc.2017.2709542
  • Energy Efficiency for Clustered Heterogeneous Multicores / Pagani, S., Pathania, A., Shafique, M., Chen, J.-J., & Henkel, J. (2017). Energy Efficiency for Clustered Heterogeneous Multicores. IEEE Transactions on Parallel and Distributed Systems, 28(5), 1315–1330. https://doi.org/10.1109/tpds.2016.2623616
  • Computing in the Dark Silicon Era: Current Trends and Research Challenges / Shafique, M., & Garg, S. (2017). Computing in the Dark Silicon Era: Current Trends and Research Challenges. IEEE Design and Test, 34(2), 8–23. https://doi.org/10.1109/mdat.2016.2633408
  • Defragmentation of Tasks in Many-Core Architecture / Pathania, A., Venkataramani, V., Shafique, M., Mitra, T., & Henkel, J. (2017). Defragmentation of Tasks in Many-Core Architecture. ACM Transactions on Architecture and Code Optimization, 14(1), 1–21. https://doi.org/10.1145/3050437
  • Fine-Grained Checkpoint Recovery for Application-Specific Instruction-Set Processors / Li, T., Shafique, M., Ambrose, J. A., Henkel, J., & Parameswaran, S. (2017). Fine-Grained Checkpoint Recovery for Application-Specific Instruction-Set Processors. IEEE Transactions on Computers, 66(4), 647–660. https://doi.org/10.1109/tc.2016.2606378
  • Probabilistic Error Modeling for Approximate Adders / Mazahir, S., Hasan, O., Hafiz, R., Shafique, M., & Henkel, J. (2017). Probabilistic Error Modeling for Approximate Adders. IEEE Transactions on Computers, 66(3), 515–530. https://doi.org/10.1109/tc.2016.2605382
  • Power Density-Aware Resource Management for Heterogeneous Tiled Multicores / Khdr, H., Pagani, S., Sousa, E., Lari, V., Pathania, A., Hannig, F., Shafique, M., Teich, J., & Henkel, J. (2017). Power Density-Aware Resource Management for Heterogeneous Tiled Multicores. IEEE Transactions on Computers, 66(3), 488–501. https://doi.org/10.1109/tc.2016.2595560
  • Thermal Safe Power (TSP): Efficient Power Budgeting for Heterogeneous Manycore Systems in Dark Silicon / Pagani, S., Khdr, H., Chen, J.-J., Shafique, M., Li, M., & Henkel, J. (2017). Thermal Safe Power (TSP): Efficient Power Budgeting for Heterogeneous Manycore Systems in Dark Silicon. IEEE Transactions on Computers, 66(1), 147–162. https://doi.org/10.1109/tc.2016.2564969
  • A versatile architecture for long-term monitoring of single-event transient durations / Savulimedu Veeravalli, V., Steininger, A., & Schmid, U. (2017). A versatile architecture for long-term monitoring of single-event transient durations. Microprocessors and Microsystems, 53, 130–144. https://doi.org/10.1016/j.micpro.2017.07.007
  • Para^2: Parameterized Path Reduction, Acceleration, and SMT for Reachability in Threshold-Guarded Distributed Algorithms / Konnov, I., Lazić, M., Veith, H., & Widder, J. (2017). Para^2: Parameterized Path Reduction, Acceleration, and SMT for Reachability in Threshold-Guarded Distributed Algorithms. Formal Methods in System Design, 51(2), 270–307. https://doi.org/10.1007/s10703-017-0297-4
    Project: APALACHE (2016–2019)
  • Guest Editors' Introduction: Computing in the Dark Silicon Era / Shafique, M., Garg, S., & Chandra, V. (2017). Guest Editors’ Introduction: Computing in the Dark Silicon Era. IEEE Design and Test, 34(2), 5–7. https://doi.org/10.1109/mdat.2017.2651065
  • On the completeness of bounded model checking for threshold-based distributed algorithms: Reachability / Konnov, I., Veith, H., & Widder, J. (2017). On the completeness of bounded model checking for threshold-based distributed algorithms: Reachability. Information and Computation, 252, 95–109. https://doi.org/10.1016/j.ic.2016.03.006
    Project: APALACHE (2016–2019)
  • Approximate Networking for Universal Internet Access / Qadir, J., Sathiaseelan, A., Farooq, U., Usama, M., Imran, M., & Shafique, M. (2017). Approximate Networking for Universal Internet Access. Future Internet, 9(4), 94. https://doi.org/10.3390/fi9040094
  • Maehara-style Modal Nested Calculi / Kuznets, R., & Straßburger, L. (2017). Maehara-style Modal Nested Calculi (RR-9123). http://hdl.handle.net/20.500.12708/39305
  • On Linear-Time Data Dissemination in Dynamic Rooted Trees / Zeiner, M., Schmid, U., & Schwarz, M. (2017). On Linear-Time Data Dissemination in Dynamic Rooted Trees. In 19th ÖMG Congress and Annual DMV Meetig Program and Books of Abstracts (p. 87). http://hdl.handle.net/20.500.12708/57124
  • Energy Efficient Embedded Video Processing Systems / Khan, M. U. K., Shafique, M., & Henkel, J. (2017). Energy Efficient Embedded Video Processing Systems. Springer International Publishing. https://doi.org/10.1007/978-3-319-61455-7

2016

  • Unfaithful Glitch Propagation in Existing Binary Circuit Models / Függer, M., Nowak, T., & Schmid, U. (2016). Unfaithful Glitch Propagation in Existing Binary Circuit Models. IEEE Transactions on Computers, 65(3), 964–978. https://doi.org/10.1109/tc.2015.2435791
  • What You Always Wanted to Know About Model Checking of Fault-Tolerant Distributed Algorithms / Konnov, I., Veith, H., & Widder, J. (2016). What You Always Wanted to Know About Model Checking of Fault-Tolerant Distributed Algorithms. In Perspectives of System Informatics : 10th International Andrei Ershov Informatics Conference, PSI 2015, in Memory of Helmut Veith, Kazan and Innopolis, Russia, August 24-27, 2015, Revised Selected Papers (pp. 6–21). Springer. https://doi.org/10.1007/978-3-319-41579-6_2
    Download: PDF (346 KB)
  • Parameterized Verification of Liveness of Distributed Algorithms / Konnov, I., Lazić, M., Veith, H., & Widder, J. (2016). Parameterized Verification of Liveness of Distributed Algorithms. Workshop on Formal Reasoning in Distributed Algorithms (FRiDA), Wien, Austria. http://hdl.handle.net/20.500.12708/86425
    Project: APALACHE (2016–2019)
  • Architectural-space exploration of approximate multipliers / Rehman, S., El-Harouni, W., Shafique, M., Kumar, A., & Henkel, J. (2016). Architectural-space exploration of approximate multipliers. In Proceedings of the 35th International Conference on Computer-Aided Design. The IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, United States of America (the). ACM New York, NY, USA. https://doi.org/10.1145/2966986.2967005
  • Power and Thermal Management in Massive Multicore Chips: Theoretical Foundation meets Architectural Innovation and Resource Allocation / Bogdan, P., Pande, P. P., Amrouch, H., Shafique, M., & Henkel, J. (2016). Power and Thermal Management in Massive Multicore Chips: Theoretical Foundation meets Architectural Innovation and Resource Allocation. In CASES (pp. 1–2). ACM. https://doi.org/10.1145/2968455.2974013
  • Model Checking of Threshold-based Fault-Tolerant Distributed Algorithms / Lazić, M., Konnov, I., Veith, H., & Widder, J. (2016). Model Checking of Threshold-based Fault-Tolerant Distributed Algorithms. 7th Workshop on Program Semantics, Specification and Verification: Theory and Applications, St. Petersburg, Russian Federation (the). http://hdl.handle.net/20.500.12708/86426
    Project: APALACHE (2016–2019)
  • Fast consensus under eventually stabilizing message adversaries / Schwarz, M., Winkler, K., & Schmid, U. (2016). Fast consensus under eventually stabilizing message adversaries. In Proceedings of the 17th International Conference on Distributed Computing and Networking. 17th International Conference on Distributed Computing and Networking, Singapore, Singapore. ACM. https://doi.org/10.1145/2833312.2833323
  • Fault-Tolerant Clock Synchronization with High Precision / Kinali, A., Huemer, F., & Lenzen, C. (2016). Fault-Tolerant Clock Synchronization with High Precision. In 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). 2016 IEEE Computer Society Annual Symposium on VLSI, Pittsburgh, United States of America (the). https://doi.org/10.1109/isvlsi.2016.88
  • A New Coding Scheme for Fault Tolerant 4-Phase Delay-Insensitive Codes / Huemer, F., Lechner, J., & Steininger, A. (2016). A New Coding Scheme for Fault Tolerant 4-Phase Delay-Insensitive Codes. In Proceedings 2016 IEEE International Conference on Computer Design (pp. 392–395). http://hdl.handle.net/20.500.12708/56881
  • A Framework for Connectivity Monitoring in Wireless Sensor Networks / Pfleger, D., & Schmid, U. (2016). A Framework for Connectivity Monitoring in Wireless Sensor Networks. In Proceedings 10th International Conference on Sensor Technlogies and Applications (SENSORCOMM’16) (pp. 40–48). IARIA XPS Press. http://hdl.handle.net/20.500.12708/56746
  • Fast, Robust, Quantizable Approximate Consensus / Charron-Bost, B., Függer, M., & Nowak, T. (2016). Fast, Robust, Quantizable Approximate Consensus. In I. Chatzigiannakis, M. Mitzenmacher, Y. Rabani, & D. Sangiorgi (Eds.), Proceedings 43rd International Colloquium on Automata, Languages, and Programming (ICALP’16) (pp. 137:1-137:14). Leibniz International Proceedings in Informatics (LIPIcs). https://doi.org/10.4230/LIPIcs.ICALP.2016.137
  • A General Approach for Comparing Metastable Behavior of Digital CMOS Gates / Polzer, T., & Steininger, A. (2016). A General Approach for Comparing Metastable Behavior of Digital CMOS Gates. In Proc 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (p. 6). http://hdl.handle.net/20.500.12708/56886
  • Study of a Delayed Single-Event Effect in the Muller C-element / Veeravalli, V. S., & Steininger, A. (2016). Study of a Delayed Single-Event Effect in the Muller C-element. In Proc 21st IEEE European Test Symposium. 21st IEEE European Test Symposium, Amsterdam, Netherlands (the). http://hdl.handle.net/20.500.12708/56885
    Project: EASET (2014–2017)
  • Design and Physical Implementation of a Target ASIC for SET Experiments / Veeravalli, V. S., & Steininger, A. (2016). Design and Physical Implementation of a Target ASIC for SET Experiments. In Proc. 2016 Euromicro Conference on Digital System Design (DSD) (pp. 694–697). IEEE. http://hdl.handle.net/20.500.12708/56884
    Project: EASET (2014–2017)
  • Task Mapping for Redundant Multithreading in Multi-Cores with Reliability and Performance Heterogeneity / Chen, K.-H., Chen, J.-J., Kriebel, F., Rehman, S., Shafique, M., & Henkel, J. (2016). Task Mapping for Redundant Multithreading in Multi-Cores with Reliability and Performance Heterogeneity. IEEE Transactions on Computers, 65(11), 3441–3455. https://doi.org/10.1109/tc.2016.2532862
  • Fifty Shades of Synchrony / Steininger, A. (2016). Fifty Shades of Synchrony. In A. Mokhov (Ed.), This Asynchronous Woirld (pp. 294–300). Newcastle University. http://hdl.handle.net/20.500.12708/29323
  • FWF-Proposal SPRG: Structural Properties of Random Graphs / Zeiner, M., Schmid, U., Schilcher, U., & Bettstetter, C. (2016). FWF-Proposal SPRG: Structural Properties of Random Graphs. http://hdl.handle.net/20.500.12708/39096
  • Gracefully Degrading Consensus and k-Set Agreement in Directed Dynamic Networks / Biely, M., Robinson, P., Schmid, U., Schwarz, M., & Winkler, K. (2016). Gracefully Degrading Consensus and k-Set Agreement in Directed Dynamic Networks (TUW-258404). http://hdl.handle.net/20.500.12708/39151
  • Decidability of Parameterized Verification / Bloem, R., Jacobs, S., Khalimov, A., Konnov, I., Rubin, S., Veith, H., & Widder, J. (2016). Decidability of Parameterized Verification. ACM SIGACT News, 47(2), 53–64. https://doi.org/10.1145/2951860.2951873
    Project: APALACHE (2016–2019)
  • Content-Aware Low-Power Configurable Aging Mitigation for SRAM Memories / Shafique, M., Khan, M. U. K., & Henkel, J. (2016). Content-Aware Low-Power Configurable Aging Mitigation for SRAM Memories. IEEE Transactions on Computers, 65(12), 3617–3630. https://doi.org/10.1109/tc.2016.2553025
  • HEX: Scaling Honeycombs is Easier than Scaling Clock Trees / Dolev, D., Függer, M., Lenzen, C., Perner, M., & Schmid, U. (2016). HEX: Scaling Honeycombs is Easier than Scaling Clock Trees. Journal of Computer and System Sciences, 82(5), 929–956. https://doi.org/10.1016/j.jcss.2016.03.001
  • Scalable Power Management for On-Chip Systems with Malleable Applications / Shafique, M., Ivanov, A., Vogel, B., & Henkel, J. (2016). Scalable Power Management for On-Chip Systems with Malleable Applications. IEEE Transactions on Computers, 65(11), 3398–3412. https://doi.org/10.1109/tc.2016.2540631
  • Easy Impossibility Proofs for k-Set Agreement / Schmid, U. (2016). Easy Impossibility Proofs for k-Set Agreement. Dagstuhl Seminar #16282 Topological Methods in Distributed Computing, Wadern, Germany. https://doi.org/10.4230/DagRep.6.7.31
  • Reconciling Fault-Tolerance and Robustness ? / Schmid, U. (2016). Reconciling Fault-Tolerance and Robustness ? Workshop on Design and Analysis of Robust Systems @ CPS-Week 2016, Hofburg Vienna, Austria, Austria. http://hdl.handle.net/20.500.12708/86399
  • Broadcasting in Random Trees / Zeiner, M., Schwarz, M., Winkler, K., & Schmid, U. (2016). Broadcasting in Random Trees. ALEA in Europe - Young Researchers Workshop, TU Wien, Austria. http://hdl.handle.net/20.500.12708/86332
  • A Programmable Delay Line for Metastability Characterization in FPGAs / Polzer, T., Huemer, F., & Steininger, A. (2016). A Programmable Delay Line for Metastability Characterization in FPGAs. In Proceedings 24th Austrian Workshop on Microelectronics (p. 6). http://hdl.handle.net/20.500.12708/56883

2015

2014

2013

2012

2011

  • Replicated processors on a single die - How independently do they fail? / Steininger, A., & Tummeltshammer, P. (2011). Replicated processors on a single die - How independently do they fail? Elektrotechnik Und Informationstechnik : E & i, 128(6), 245–250. https://doi.org/10.1007/s00502-011-0005-9
  • Fault-Tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation / Dolev, D., Függer, M., Lenzen, C., & Schmid, U. (2011). Fault-Tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation. In Stabilization, Safety, and Security of Distributed Systems (pp. 163–177). Springer Berlin / Heidelberg. https://doi.org/10.1007/978-3-642-24550-3_14
  • Brief announcement: full reversal routing as a linear dynamical system / Charron-Bost, B., Fuegger, M., Welch, J. L., & Widder, J. (2011). Brief announcement: full reversal routing as a linear dynamical system. In Proceedings of the 23rd ACM symposium on Parallelism in algorithms and architectures - SPAA ’11. SPAA ’11, San Jose, United States of America (the). ACM. https://doi.org/10.1145/1989493.1989510
  • Hardware support for efficient testing of embedded software / Reinbacher, T., Steininger, A., Müller, T., Horauer, M., Brauer, J., & Kowalewski, S. (2011). Hardware support for efficient testing of embedded software. In International Conference on Mechatronic and Embedded Systems and Applications. The 7th ASME/IEEE International Conference on Mechatronic and Embedded Systems and Applications, Washington, United States of America (the). ASME. http://hdl.handle.net/20.500.12708/54082
    Project: CEVTES (2010–2013)
  • Automated test-trace inspection for microcontroller binary code / Reinbacher, T., Brauer, J., Schachinger, D., Steininger, A., & Kowalewski, S. (2011). Automated test-trace inspection for microcontroller binary code. In Runtime Verification (pp. 239–244). http://hdl.handle.net/20.500.12708/54078
    Project: CEVTES (2010–2013)
  • Investigating the impact of process variations on an asynchronous Time-Triggered-Protocol controller / Ferringer, M. (2011). Investigating the impact of process variations on an asynchronous Time-Triggered-Protocol controller. In 2011 IEEE/IFIP 41st International Conference on Dependable Systems and Networks Workshops (DSN-W). Dependable Systems and Networks Workshops (DSN-W), 2011 IEEE/IFIP 41st International Conference on, Hong Kong, Hong Kong. https://doi.org/10.1109/dsnw.2011.5958834
    Project: ARTS (2007–2011)
  • Brief Announcement: Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems / Biely, M., Robinson, P., & Schmid, U. (2011). Brief Announcement: Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems. In PODC’11 (pp. 227–228). ACM. http://hdl.handle.net/20.500.12708/54097
  • Reconciling Fault-Tolerant Distributed Algorithms and Real-Time Computing / Moser, H., & Schmid, U. (2011). Reconciling Fault-Tolerant Distributed Algorithms and Real-Time Computing. In Structural Information and Communication Complexity (pp. 42–53). Springer Berlin / Heidelberg. https://doi.org/10.1007/978-3-642-22212-2_5
  • Testing microcontroller software simulators / Reinbacher, T., Gückel, D., & Horauer, M. (2011). Testing microcontroller software simulators. In Workshop on Software Language Engineering for Cyber-physical Systems. WS4C 2011, Berlin, Germany. http://hdl.handle.net/20.500.12708/54083
    Project: CEVTES (2010–2013)
  • Past Time LTL Runtime Verification for Microcontroller Binary Code / Reinbacher, T., Brauer, J., Horauer, M., Steininger, A., & Kowalewski, S. (2011). Past Time LTL Runtime Verification for Microcontroller Binary Code. In Formal Methods for Industrial Critical Systems (pp. 37–51). Springer Berlin / Heidelberg. https://doi.org/10.1007/978-3-642-24431-5_5
    Project: CEVTES (2010–2013)
  • Partial is Full / Charron-Bost, B., Függer, M., Welch, J. L., & Widder, J. (2011). Partial is Full. In Structural Information and Communication Complexity (pp. 113–124). Springer Berlin / Heidelberg. https://doi.org/10.1007/978-3-642-22212-2_11
  • Full Reversal Routing as a Linear Dynamical System / Charron-Bost, B., Függer, M., Welch, J. L., & Widder, J. (2011). Full Reversal Routing as a Linear Dynamical System. In Structural Information and Communication Complexity (pp. 101–112). Springer Berlin / Heidelberg. https://doi.org/10.1007/978-3-642-22212-2_10
  • On the Performance of a Retransmission-Based Synchronizer / Nowak, T., Függer, M., & Kößler, A. (2011). On the Performance of a Retransmission-Based Synchronizer. In Structural Information and Communication Complexity (pp. 234–245). Springer Berlin / Heidelberg. http://hdl.handle.net/20.500.12708/54033
  • Conversion and interfacing techniques for asynchronous circuits / Ferringer, M. (2011). Conversion and interfacing techniques for asynchronous circuits. In 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. 14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2011), Cottbus, Germany. https://doi.org/10.1109/ddecs.2011.5783039
    Project: ARTS (2007–2011)
  • Conversion of two- to four-phase delay-insensitive asynchronous circuits / Ferringer, M. (2011). Conversion of two- to four-phase delay-insensitive asynchronous circuits. In 2011 IEEE EUROCON - International Conference on Computer as a Tool. EUROCON 2011, Lisbon, Portugal. https://doi.org/10.1109/eurocon.2011.5929318
    Project: ARTS (2007–2011)
  • Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems / Biely, M., Robinson, P., & Schmid, U. (2011). Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems. In OPODIS’11 (pp. 299–312). Springer Berlin / Heidelberg. http://hdl.handle.net/20.500.12708/54094
  • Solving k-Set Agreement with Stable Skeleton Graphs / Biely, M., Robinson, P., & Schmid, U. (2011). Solving k-Set Agreement with Stable Skeleton Graphs. In 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum. International Parallel and Distributed Processing Symposium (IPDPS), Denver, United States of America (the). https://doi.org/10.1109/ipdps.2011.301
  • The Asynchronous Bounded-Cycle Model / Robinson, P., & Schmid, U. (2011). The Asynchronous Bounded-Cycle Model. Theoretical Computer Science, 412(40), 5580–5601. https://doi.org/10.1016/j.tcs.2010.08.001
  • Synchronous consensus under hybrid process and link failures / Biely, M., Schmid, U., & Weiss, B. (2011). Synchronous consensus under hybrid process and link failures. Theoretical Computer Science, 412(40), 5602–5630. https://doi.org/10.1016/j.tcs.2010.09.032
  • VLSI Implementation of a Distributed Algorithm for Fault-Tolerant Clock Generation / Fuchs, G., & Steininger, A. (2011). VLSI Implementation of a Distributed Algorithm for Fault-Tolerant Clock Generation. Journal of Electrical and Computer Engineering, 2011. https://doi.org/10.1155/2011/936712
    Project: DARTS (2005–2010)
  • On Self-Timed Circuits in Real-Time Systems / Ferringer, M. (2011). On Self-Timed Circuits in Real-Time Systems. International Journal of Reconfigurable Computing, 2011, 1–16. https://doi.org/10.1155/2011/972375
    Project: ARTS (2007–2011)
  • On Efficient Checking of Link-reversal-based Concurrent Systems / Függer, M., & Widder, J. (2011). On Efficient Checking of Link-reversal-based Concurrent Systems. PUMA/RISE Seminar, Traunkirchen, Austria. http://hdl.handle.net/20.500.12708/85311
  • Precise control flow reconstruction using boolean logic / Reinbacher, T., & Brauer, J. (2011). Precise control flow reconstruction using boolean logic. In Proceedings of the ninth ACM international conference on Embedded software - EMSOFT ’11. EMSOFT2011, ACM international conference on Embedded software, Taipei, Non-EU. ACM New York. https://doi.org/10.1145/2038642.2038662
    Project: CEVTES (2010–2013)

2010

2009

2008

  • Towards a Systematic Test for Embedded Automotive Communication Systems / Armengaud, E., Steininger, A., & Horauer, M. (2008). Towards a Systematic Test for Embedded Automotive Communication Systems. IEEE Transactions on Industrial Informatics, 4(3), 146–155. https://doi.org/10.1109/TII.2008.2002704
    Project: STEACS (2003–2008)
  • An Object-oriented DEV Approach to ARGESIM Benchmark C16 'Restaurant Business Dynamics' using Enterprise Dynamics / Tauböck, S. M., Jahn, P., Polzer, T., & Schuster, A. (2008). An Object-oriented DEV Approach to ARGESIM Benchmark C16 “Restaurant Business Dynamics” using Enterprise Dynamics. Simulation News Europe SNE, 18(1), 41–42. http://hdl.handle.net/20.500.12708/171152
  • The asynchronous bounded-cycle model / Schmid, U., & Robinson, P. (2008). The asynchronous bounded-cycle model. In Proceedings of the twenty-seventh ACM symposium on Principles of distributed computing - PODC ’08. ACM Symposium on Principles of Distributed Computing, Las Vegas, United States of America (the). Association for Computing Machinery (ACM). https://doi.org/10.1145/1400751.1400815
  • Safe deterministic replay for stimulating the clock synchronization algorithm in time-triggered systems / Armengaud, E., Függer, M., & Steininger, A. (2008). Safe deterministic replay for stimulating the clock synchronization algorithm in time-triggered systems. In 2008 IEEE International Workshop on Factory Communication Systems. WFCS, Turin, Italy. https://doi.org/10.1109/wfcs.2008.4638707
    Project: EXTRACT (2005–2008)
  • The Asynchronous Bounded Cycle Model / Robinson, P., & Schmid, U. (2008). The Asynchronous Bounded Cycle Model. In Stabilization, Safety, and Security of Distributed Systems. 10 International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2008), Detroit, USA, Non-EU. Lecture Notes in Conputer Science / Springer Verlag. https://doi.org/10.1007/978-3-540-89335-6_20
  • Keynote: Distributed Algorithms and VLSI / Schmid, U. (2008). Keynote: Distributed Algorithms and VLSI. In Stabilization, Safety, and Security of Distributed Systems (pp. 3–3). Lecture Notes in Conputer Science / Springer Verlag. https://doi.org/10.1007/978-3-540-89335-6_3
  • Optimal Deterministic Remote Clock Estimation in Real-Time Systems / Moser, H., & Schmid, U. (2008). Optimal Deterministic Remote Clock Estimation in Real-Time Systems. In Principles of Distributed Systems (pp. 363–387). Lecture Notes in Computer Science / Springer Verlag. https://doi.org/10.1007/978-3-540-92221-6_24
  • Towards a real-time distribiuted computing model / Moser, H. (2008). Towards a real-time distribiuted computing model. Theoretical Computer Science, 410(6–7), 629–659. https://doi.org/10.1016/j.tcs.2008.10.012
  • Statechart Modelling for ARGESIM Benchmark C10 'Dining Philosophers Problem II' using Simulink/Stateflow / Legourski, V., Huang, Y., Cevan, O., & Breitenecker, F. (2008). Statechart Modelling for ARGESIM Benchmark C10 “Dining Philosophers Problem II” using Simulink/Stateflow. Simulation News Europe SNE, 18(1), 39–40. http://hdl.handle.net/20.500.12708/171151
  • Exploring Hardware Software Partitioning on the Example of a Fingerprint Verification System / Hepp, S., Klima, G., Kadlec, A., Krammer, L., Luckner, W., Prokesch, D., Resch, S., Wasicek, A., Wilhelm, J., Tummeltshammer, P., & Delvai, M. (2008). Exploring Hardware Software Partitioning on the Example of a Fingerprint Verification System. In Proc. of the 16th Austrian Workshop on Microelectronics 2008 (pp. 7–12). http://hdl.handle.net/20.500.12708/52482
  • Extending two non-parametric transforms for FPGA based stereo matching using bayer filtered cameras / Ambrosch, K., Humenberger, M., Kubinger, W., & Steininger, A. (2008). Extending two non-parametric transforms for FPGA based stereo matching using bayer filtered cameras. In 2008 IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops. IEEE Conference on Computer Vision and Pattern Recognition, 2008. CVPR ’08, Anchorage, Alaska, USA, Non-EU. https://doi.org/10.1109/cvprw.2008.4563146
  • Experimental Evaluation of the FlexRay Clock Synchronization Service / Armengaud, E. (2008). Experimental Evaluation of the FlexRay Clock Synchronization Service. In 20. Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (pp. 85–89). http://hdl.handle.net/20.500.12708/52483
    Project: EXTRACT (2005–2008)
  • Fault Tolerant Four-State Logic by Using Self-Healing Cells / Panhofer, T., Friesenbichler, W., & Delvai, M. (2008). Fault Tolerant Four-State Logic by Using Self-Healing Cells. In 2008 IEEE International Conference on Computer Design (p. 6). IEEE. http://hdl.handle.net/20.500.12708/52475
  • Automated Generation of Explicit Connectors for Component Based Hardware/Software Interaction in Embedded Real-Time Systems / Forster, W., Kutschera, C., Steininger, A., & Göschka, K. M. (2008). Automated Generation of Explicit Connectors for Component Based Hardware/Software Interaction in Embedded Real-Time Systems. In Proceedings of the 16th International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS 2008), (IPDPS 2008) (pp. 1–8). IEEE Computer Society. http://hdl.handle.net/20.500.12708/52268
  • An Object-oriented Solution to ARGESIM Benchmark C4 'Dining Philosophers Problem' implemented with AnyLogic / Gyimesi, M., Dielacher, A., Handl, T., & Wittmann, C. (2008). An Object-oriented Solution to ARGESIM Benchmark C4 “Dining Philosophers Problem” implemented with AnyLogic. Simulation News Europe SNE, 18(1), 31–32. http://hdl.handle.net/20.500.12708/171148
  • An Operating System for a Time-Predictable Computing Node / Khyo, G., Puschner, P., & Delvai, M. (2008). An Operating System for a Time-Predictable Computing Node. In Software Technologies for Embedded and Ubiquitous Systems (pp. 150–161). Lecture Notes in Computer Science / Springer Verlag. https://doi.org/10.1007/978-3-540-87785-1_14
  • Improving Fault Tolerance by Using Reconfigurable Asynchronous Circuits / Friesenbichler, W., Panhofer, T., & Delvai, M. (2008). Improving Fault Tolerance by Using Reconfigurable Asynchronous Circuits. In 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, 2008, Bratislava, Slovakia, EU. IEEE. https://doi.org/10.1109/ddecs.2008.4538799
  • A Concept for Hybrid Fault Injection in Distributed Systems / Trödhandl, C., & Weiss, B. (2008). A Concept for Hybrid Fault Injection in Distributed Systems. In Testing: Academic and Industrial Conference --- Practice and Research Techniques (Fast Abstracts). Testing: Academic and Industrial Conference --- Practice and Research Techniques, Windsor, United Kingdom, EU. http://hdl.handle.net/20.500.12708/52265
  • Implementation of a Design Tool for Automated Generation of Four State Logic Circuits / Lechner, J., & Delvai, M. (2008). Implementation of a Design Tool for Automated Generation of Four State Logic Circuits. In Proceedings of the Junior Scientist Conference 2008 (pp. 85–86). http://hdl.handle.net/20.500.12708/52477
  • Automated Testing of FlexRay Clusters for System Inconsistencies in Automotive Networks / Milbredt, P., Steininger, A., & Horauer, M. (2008). Automated Testing of FlexRay Clusters for System Inconsistencies in Automotive Networks. In 4th IEEE International Symposium on Electronic Design, Test and Applications (delta 2008). IEEE International Workshop on Electronic Design, Test and Applications, Hong-Kong, Non-EU. https://doi.org/10.1109/delta.2008.74
  • An investigation of the clique problem in FlexRay / Milbredt, P., Horauer, M., & Steininger, A. (2008). An investigation of the clique problem in FlexRay. In 2008 International Symposium on Industrial Embedded Systems. SIES´2008 Third international symposium on industrial embedded systems, Montpellier - La Grande Motte, France, EU. https://doi.org/10.1109/sies.2008.4577700
  • Exploring the Usefulness of the Gate-level Stuck-at Fault Model for Muller C-Elements / Grahsl, J., Handl, T., & Steininger, A. (2008). Exploring the Usefulness of the Gate-level Stuck-at Fault Model for Muller C-Elements. In 20. Workshop Testmethoden und Vuverlässigkeit von Schaltungen und Systemen (pp. 165–169). http://hdl.handle.net/20.500.12708/52459
    Project: DARTS (2005–2010)
  • Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip / Fuchs, G., Függer, M., Schmid, U., & Steininger, A. (2008). Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip. In 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools. 11th EUROMICRO Conference on Digital System Design (DSD 2008), Parma, Italien, EU. IEEE. https://doi.org/10.1109/dsd.2008.65
    Project: DARTS (2005–2010)

2007

  • FIT-IT Projekt DARTS: Dezentrale fehlertolerante Taktgenerierung / Schmid, U., Steininger, A., & Sust, M. (2007). FIT-IT Projekt DARTS: Dezentrale fehlertolerante Taktgenerierung. Elektrotechnik und Informationstechnik : e & i, 124(1–2), 3–8. https://doi.org/10.1007/s00502-006-0409-0
  • The Effect of Quartz Drift on Convergence-Average based Clock Synchronization / Armengaud, E., Steininger, A., & Hanzlik, A. (2007). The Effect of Quartz Drift on Convergence-Average based Clock Synchronization. In Proceedings of the 12th IEEE Conference on Emerging Technologies and Factory Automation (pp. 1123–1130). http://hdl.handle.net/20.500.12708/52061
    Project: EXTRACT (2005–2008)
  • Clock Synchronization in the Byzantine-Recovery Failure Model / Anceaume, E., Delporte-Gallet, C., Fauconnier, H., Hurfin, M., & Widder, J. (2007). Clock Synchronization in the Byzantine-Recovery Failure Model. In International Conference On Principles Of DIstributed System (pp. 90–104). http://hdl.handle.net/20.500.12708/52073
  • Synchronous Consensus with Mortal Byzantines / Widder, J., Gridling, G., Weiss, B., & Blanquart, J.-P. (2007). Synchronous Consensus with Mortal Byzantines. In Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks. IEEE Conference on Dependable Systems and Networks (DSN), Philadelphia, PA, United States of America (the). http://hdl.handle.net/20.500.12708/52033
  • Tolerating Corrupted Communication / Biely, M., Charron-Bost, B., Gaillard, A., Hutle, M., Schiper, A., & Widder, J. (2007). Tolerating Corrupted Communication. In 26th ACM Symposium on Principles of Distributed Computing (PODC’07) (pp. 244–253). http://hdl.handle.net/20.500.12708/52017
  • A Fail-Silent Reconfigurable Superscalar Processor / Kottke, T., & Steininger, A. (2007). A Fail-Silent Reconfigurable Superscalar Processor. In 13th Pacific Rim International Symposium on Dependable Computing (PRDC’07), Melbourne (pp. 232–239). http://hdl.handle.net/20.500.12708/52063
  • Vergleich zweier zwischen Sicherheit und Performanz rekonfigurierbarer Prozessorsysteme / Kottke, T., & Steininger, A. (2007). Vergleich zweier zwischen Sicherheit und Performanz rekonfigurierbarer Prozessorsysteme. In 19. Workshop - Testmethoden und Zuverlässigkeit von Schaltungen und Systemen. 19. ITG/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Errlangen, EU. http://hdl.handle.net/20.500.12708/51797
  • Exploring Hardware Software Partitioning on the Example of a Face Recognition System / Angerer, C., Cevan, O., Fauster, L., Huang, Y., Huber, B., Legourski, V., Pirker, S., Polzer, T., Reichhard, D., Rigler, D., Schuster, A., Weirich, B., Tummeltshammer, P., & Delvai, M. (2007). Exploring Hardware Software Partitioning on the Example of a Face Recognition System. In Austrochip - Workshop on Microelectronics (pp. 121–127). http://hdl.handle.net/20.500.12708/52062
  • Hardware Implementation of an SAD based stereo vision algorithm / Ambrosch, K., Humenberger, M., Kubinger, W., & Steininger, A. (2007). Hardware Implementation of an SAD based stereo vision algorithm. In Proceedings of Third IEEE Workshop on Embedded Computer Vision. Third IEEE Workshop on Embedded Computer Vision, Minneapolis, Non-EU. http://hdl.handle.net/20.500.12708/52065
  • Booting Clock Synchronization in Partially Synchronous Systems with Hybrid Process and Link Failures / Widder, J., & Schmid, U. (2007). Booting Clock Synchronization in Partially Synchronous Systems with Hybrid Process and Link Failures. In Distributed Computing (pp. 115–140). Springer-Verlag. http://hdl.handle.net/20.500.12708/25412
  • Time-Multiplexed Multiple Constant Multiplication / Tummeltshammer, P., Hoe, James. C., & Pueschel, M. (2007). Time-Multiplexed Multiple Constant Multiplication. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (pp. 1551–1563). IEEE. http://hdl.handle.net/20.500.12708/25411
  • LTCC: a fascinating technology platform for miniaturized devices / Schmid, U. (2007). LTCC: a fascinating technology platform for miniaturized devices. In T. Becker, C. Cané, & N. S. Barker (Eds.), Smart Sensors, Actuators, and MEMS III (Proceedings Volume). SPIE. https://doi.org/10.1117/12.722793
  • Graphical Microcontroller Programming (GMCP) / Jahn, P., & Polzer, T. (2007). Graphical Microcontroller Programming (GMCP). IEEE International Conference on Industrial Informatics - INDIN 2007, Wien, Austria. http://hdl.handle.net/20.500.12708/84609
  • Towards a Systematic Design of Fault-Tolerant Asynchronous Circuits / Schmid, U., Steininger, A., & Veith, H. (2007). Towards a Systematic Design of Fault-Tolerant Asynchronous Circuits. In Fachtagung Zuverlässigkeit und Entwurf (pp. 173–174). VDE Verlag. http://hdl.handle.net/20.500.12708/51805
  • A Perspective of Fault-Tolerant Clock Synchronization / Schmid, U. (2007). A Perspective of Fault-Tolerant Clock Synchronization. In IEEE Symposium on Precision Clock Synchronization for Measurement, Control and Communication. 2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication, Vienna, Austria. http://hdl.handle.net/20.500.12708/52101
  • Concepts and Tools for the Test of the Communication Sub-System of Time-Triggered Distributed Embedded Systems / Horauer, M., Armengaud, E., & Steininger, A. (2007). Concepts and Tools for the Test of the Communication Sub-System of Time-Triggered Distributed Embedded Systems. In ASME 2007 International Conference on Design Engineering Technical Conferences & Computers and Information in Engineering. International Conference on Design Engineering Technical Conferences & Computers and Information in Engineering (ASME), Las Vegas, Non-EU. http://hdl.handle.net/20.500.12708/52064
    Project: STEACS (2003–2008)
  • A Novel Interconnection Approach for Globally Asynchronous Locally Synchronous Circuits / Armengaud, E., & Forster, W. (2007). A Novel Interconnection Approach for Globally Asynchronous Locally Synchronous Circuits. In Austrochip - Workshop on Microelectronics (pp. 107–113). http://hdl.handle.net/20.500.12708/52060
  • Adopting the Scan Approach for a Fault Tolerant Asynchronous Clock Generation Circuit / Handl, T., Steininger, A., & Kempf, G. (2007). Adopting the Scan Approach for a Fault Tolerant Asynchronous Clock Generation Circuit. In Proceedings IDT’07 - The Second International Design and Test Workshop (pp. 115–119). http://hdl.handle.net/20.500.12708/52055
    Project: DARTS (2005–2010)
  • SELF-HEALING CIRCUITS FOR SPACE-APPLICATIONS / Delvai, M., & Panhofer, T. (2007). SELF-HEALING CIRCUITS FOR SPACE-APPLICATIONS. In Proceedings of 17th INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (pp. 505–506). http://hdl.handle.net/20.500.12708/52054
  • SAFE - A Scalable Environment for Automated Transistor Level Fault Effect Analysis / Grahsl, J., Handl, T., Steininger, A., & Kempf, G. (2007). SAFE - A Scalable Environment for Automated Transistor Level Fault Effect Analysis. In Austrochip - Workshop on Microelectronics (pp. 91–98). http://hdl.handle.net/20.500.12708/52053
    Project: DARTS (2005–2010)
  • Relating Stabilizing Timing Assumptions to Stabilizing Failure Detectors Regarding Solvability and Efficiency / Biely, M., Hutle, M., Penso, L. D., & Widder, J. (2007). Relating Stabilizing Timing Assumptions to Stabilizing Failure Detectors Regarding Solvability and Efficiency. In stabilization. Ninth International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2007), Paris, EU. http://hdl.handle.net/20.500.12708/52032
  • An Efficient Test Strategy for a Fault-Tolerant Clock Generator for Systems-on-Chip / Handl, T., Steininger, A., & Kempf, G. (2007). An Efficient Test Strategy for a Fault-Tolerant Clock Generator for Systems-on-Chip. In 19. Workshop - Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (pp. 66–70). http://hdl.handle.net/20.500.12708/51796
    Project: DARTS (2005–2010)

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  • Daniel Müller-Gritschneder: Best Paper Award: Moritz Thoma, Tobias Preintner, Emad Aghajanzadeh, Shambhavi Balamuthu Sampath, Pierpaolo Mori, Nael Fasfous, Manoj-Rohit Vemparala, Alexander Frickenstein, Daniel Mueller-Gritschneder, Ulf Schlichtmann; Uncertainty Aware Training to Improve Uncertainty Active Learning for Semantic Segmentation Proceedings of the Computer Vision and Pattern Recognition Conference (CVPR) Workshops, 2025
    2025 / SAIAD Workshop, CVPR25 / USA / Website
  • Daniel Müller-Gritschneder: Best Student Paper Award: Pierpaolo Mori, Lukas Frickenstein, Shambhavi Balamuthu Sampath, Moritz Thoma, Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Christian Unger, Walter Stechele, Daniel Mueller-Gritschneder, Claudio Passerone "Wino Vidi Vici: Conquering Numerical Instability of 8-Bit Winograd Convolution for Accurate Inference Acceleration on Edge"
    2024 / IEEE/CVF Winter Conference on Applications of Computer Vision 2024 / USA
  • Daniel Müller-Gritschneder: Best Paper Award: Samira Ahmadi, Rafael Stahl, Philipp van Kempen, Daniel Mueller-Gritschneder and Ulf Schlichtmann. "Towards Rapid Exploration of Heterogeneous TinyML Systems using Virtual Platforms and TVM’s UMA."
    2023 / Workshop on Compilers, Deployment, and Tooling for Edge AI. / Germany
  • Daniel Müller-Gritschneder: Habilitationspreis
    2019 / Bund der Freunde der technischen Universität München / Germany / Website
  • Daniel Müller-Gritschneder: Best Paper Award for Paper: Saman Payvar, Mir Khan, Rafael Stahl, Daniel Mueller-Gritschneder, Jani Boutellier "Neural Network-based Vehicle Image Classification for IoT Devices"
    2019 / IEEE International Workshop on Signal Processing Systems, SiPS 2019 / China
  • Daniel Müller-Gritschneder: Senior Member
    2019 / IEEE / USA
  • Josef Widder: FIT-IT Embedded Systems Dissertationsstipendium "Distributed Computing in the Presence of Bounded Asynchrony"
    2004 / Austria
  • Ulrich Schmid: Synchronized Universal Time Coordinated for Distributed Real-Time Systems
    1997 / START-Programm / Austria
  • Ulrich Schmid: Kardinal Innitzer Förderungspreis
    1995 / Kardinal-Innitzer-Preis / Austria

Soon, this page will include additional information such as reference projects, conferences, events, and other research activities.

Until then, please visit Embedded Computing Systems’ research profile in TISS .