Research Unit Embedded Computing Systems E191-02

The scope of our research and teaching activities at the Embedded Computing Systems unit ranges from dependable and power-efficient digital circuits to future generation computer architectures to networked embedded systems and fault-tolerant distributed systems in general.

Contact

Head: Ulrich Schmid
Web: informatics.tuwien.ac.at/orgs/e191-02
E-Mail: sek.e191-02@informatik.tuwien.ac.at
Location: Treitlstrasse 3

About

Nonwithstanding a clear focus on scientific research, the spectrum of our work ranges from formal-mathematical analysis to simulation-based experimental evaluation to prototype implementations. With respect to teaching, the ECS group is primarily responsible for related courses in the Bachelor’s and Master’s programs Technische Informatik (Computer Engineering).

Embedded Computing Systems is part of the faculty’s Institute of Computer Engineering.

Professors

Scientific Staff

Administrative Staff

External Lecturers

Manfred Siegl M. Siegl

Lecturer
DI Dr.

Courses

2019W

Advanced Computer Architecture / VU / 191.105
Advanced Digital Design / LU / 182.754
Advanced Digital Design / VU / 182.755
Advanced FPGA Design / VU / 182.756
Application- Specific Computing Architecture and Systems / VU / 182.744
Bachelor Thesis for Computer Science and Business Informatics / PR / 182.698
Being a Researcher / VU / 199.086
Computer Engineering Practical / PR / 182.699
Computer Engineering Project / PR / 182.758
Computer Networks / VU / 182.752
Current Trends in Computer Science / VU / 195.072
Deontic Logic for Normative Reasoning / VU / 199.087
Digital Design / VO / 182.693
Doctorand's seminar / SE / 182.070
HW/SW Codesign / LU / 182.701
HW/SW Codesign / VU / 182.700
Orientation Bachelor with Honors of Informatics and Business Informatics / SE / 180.767
Philosophy of Science / VU / 195.080
Problems in Distributed Computing / VU / 182.703
Program Analysis / VU / 184.703
Propädeutikum für Informatik / VU / 180.771
Research Seminar LogiCS / SE / 184.767
Scientific Project Computer Engineering / PR / 182.759
Scientific Research and Writing / SE / 193.052
Seminar Computer Engineering / SE / 182.757
Seminar for Master Students in Computer Engineering / SE / 180.778
Theoretical Computer Science and Logics / VU / 185.278

Projects

Digital Modeling of Asynchronous Integrated Circuits
2019 – 2023 / Austrian Science Fund (FWF)
Trustworthy IoT for CPS
2017 – 2020 / Austrian Research Promotion Agency (FFG)
Robust Atomic Computing Platform and Enhanced Fault-Tolerant Distributed Algorithms
2017 – 2019 / Intel Corporation
Gracefully Degrading Agreement in Directed Dynamic Networks
2016 – 2020 / Austrian Science Fund (FWF)

Publications

2019

Maehara-style Modal Nested Calculi / R. Kuznets, L. Strassburger / Archive for Mathematical Logic, 58 (2019), 3-4; 359 - 385
Novel Approaches for Efficient Delay-Insensitive Communication / F. Huemer, A. Steininger / Journal of Low Power Electronics and Applications, 9 (2019), 16; 41 pages
A Roadmap Toward the Resilient Internet of Things for Cyber-Physical Systems / D. Ratasich, F. Khalid, F. Geissler, R. Grosu, M. Shafique, E. Bartocci / IEEE Access, 7 (2019), 1; 24 pages
Causality and Epistemic Reasoning in Byzantine Multi-Agent Systems / R. Kuznets, L. Prosperi, U. Schmid, K. Fruzsa / Poster: TARK 2019: Theoretical Aspects of Rationality and Knowledge, Toulouse, France; 2019-07-17 - 2019-07-19; in: "Proceedings Seventeenth Conference on Theoretical Aspects of Rationality and Knowledge (TARK 2019)", L. Moss (ed.); Electronic Proceedings in Theoretical Computer Science, 297 (2019), ISSN: 2075-2180; 293 - 312

2018

Proceedings 32nd International Symposium on Distributed Computing / U. Schmid, J. Widder / Dagstuhl Publishing LIPICS, 2018, ISBN: 978-3-95977-092-7; 736 pages
X-DNNs: Systematic Cross-Layer Approximations for Energy-Efficient Deep Neural Networks / M. Hanif, A. Marchisio, T. Arif, R. Hafiz, S. Rehman, M. Shafique / ASP Journal of Low Power Electronics (JOLPE), 14 (2018), 4; 520 - 534
SmartDPM: Machine Learning-based Dynamic Power Management for Multi-Core Microprocessors / S. Pudukotai Dinakarrao, A. Jantsch, M. Shafique / ASP Journal of Low Power Electronics (JOLPE), 14 (2018), 4; 460 - 474
Runtime Hardware Trojan Monitors Through Modeling Burst Mode Communication Using Formal Verification / F. Khalid, S. R. Hasan, O. Hasan, F. Awwad / Integration the VLSI journal, 61 (2018), C; 62 - 76
Statistical Model Checking of Relief Supply Location and Distribution in Natural Disaster Management / S. Iqbal, S. Sardar, F. Khalid, O. Hasan / International Journal of Disaster Risk Reduction, 31 (2018), October 2018; 1043 - 1053
Automated Competitive Analysis of Real-time Scheduling with Graph Games / K. Chatterjee, A. Pavlogiannis, A. Kößler, U. Schmid / Real-Time Systems, 54 (2018), 1; 166 - 207
Metastability-Containing Circuits / S. Friedrichs, M Függer, C. Lenzen / IEEE Transactions on Computers, 67 (2018), 8; 1167 - 1183
Towards Approximate Computing for Coarse-Grained Reconfigurable Architectures / O. Akbari, M. Kamal, A. Afzali-Kusha, M. Pedram, M. Shafique / IEEE Micro, Early Access (2018), 1 - 10
Run-Time Adaptive Power-Aware Reliability Management for Manycores / M. Salehi, A. Ejlali, M. Shafique / Ieee Design & Test, 35 (2018), 5; 36 - 44
Hybrid Scratchpad Video Memory Architecture for Energy-Efficient Parallel HEVC / F. M. Sampaio, B. Zatt, M. Shafique, J. Henkel, S. Bampi / IEEE Transactions on Circuits and Systems for Video Technology, Early Access (2018), 1 - 12
SquASH: Approximate Square-Accumulate with Self-Healing / G. A. Gillani, M. Hanif, M. Krone, S. H. Gerez, M. Shafique, A. B. J. Kokkeler / IEEE Access, 6 (2018), 49112 - 49128
adBoost: Thermal Aware Performance Boosting Through Dark Silicon Patterning / A. Kanduri, M.-H. Haghbayan, A. Rahmani, M. Shafique, A. Jantsch, P. Liljeberg / IEEE Transactions on Computers, 67 (2018), 8; 1062 - 1077
Adaptive Approximate Computing in Arithmetic Datapaths / S. Mazahir, O. Hasan, M. Shafique / Ieee Design & Test, 35 (2018), 4; 65 - 74
Aging-Aware Workload Management on Embedded GPU Under Process Variation / H. Lee, M. Shafique, M. Al Faruque / IEEE Transactions on Computers, 67 (2018), 7; 920 - 933
McSeVIC: A Model Checking Based Framework for Security Vulnerability Analysis of Integrated Circuits / I. H. Abbassi, F. Khalid, O. Hasan, A. M. Kamboh, M. Shafique / IEEE Access, 6 (2018), 32240 - 32257
Gracefully degrading consensus and k-set agreement in directed dynamic networks / M. Biely, P. Robinson, U. Schmid, M. Schwarz, K. Winkler / Theoretical Computer Science, 726 (2018), 41 - 77
Refined Metastability Characterization Using a Time-to-Digital Converter / T. Polzer, F. Huemer, A. Steininger / Microelectronics Reliability, 80 (2018), 91 - 99
Advanced Delay-Insensitive 4-Phase Protocols / F. Huemer, A. Steininger / in: "2018 Austrochip Workshop on Microelectronics (Austrochip)", issued by: IEEE CS Press; IEEE Xplore Digital Library, 2018, ISBN: 978-1-5386-8200-5, 50 - 55
Using a Duplex Time-to-Digital Converter for Metastability Characterization of an FPGA / F. Huemer, T. Polzer, A. Steininger / in: "2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)", issued by: IEEE CS Press; IEEE Xplore Digital Library, 2018, ISBN: 978-1-5386-5754-6, 141 - 146
Partially Systematic Constant-Weight Codes for Delay-Insensitive Communication / F. Huemer, A. Steininger / in: "2018 24th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)", issued by: IEEE CS Press; IEEE Xplore Digital Library, 2018, ISBN: 978-1-5386-5883-3, 17 - 25
State Recovery for Coarse-Grain TMR Designs in FPGAs Using Partial Reconfiguration / M. Schütz, A. Steininger, F. Huemer, J. Lechner / in: "2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)", issued by: IEEE CS Press; IEEE Xplore Digital Library, 2018, ISBN: 978-1-5386-8398-9, 6 pages
TransportBuddy: Navigation in Human Accessible Spaces / M. Bader, G. Todoran, F. Beck, B. Binder, K. Buchegger / in: "Proceedings of 7th Transport Research Arena TRA 2018", Zenodo, 2018, 10 pages
PruNet: Class-Blind Pruning Method for Deep Neural Networks / A. Marchisio, M. Hanif, M. Martina, M. Shafique / Poster: IEEE International Joint Conference on Neural Networks (IJCNN), Rio de Janeiro, Brasil; 2018-07-08 - 2018-07-13; in: "2018 International Joint Conference on Neural Networks (IJCNN)", (2018), ISBN: 978-1-5090-6014-6; 1 - 8
Error Resilience Analysis for Systematically Employing Approximate Computing in Convolutional Neural Networks / M. Hanif, R. Hafiz, M. Shafique / Poster: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18), Dresden, Deutschland; 2018-03-19 - 2018-03-23; in: "IEEE/ACM 21st Design, Automation and Test in Europe Conference & Exhibition (DATE)", (2018), ISBN: 978-3-9819263-1-6; 913 - 916
DeMAS: An Efficient Design Methodology for Building Approximate Adders for FPGA-Based Systems / B. Prabakaran, S. Rehman, M. Hanif, S. Ullah, G. Mazaheri, A. Kumar, M. Shafique / Poster: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18), Dresden, Deutschland; 2018-03-19 - 2018-03-23; in: "IEEE/ACM 21st Design, Automation and Test in Europe Conference & Exhibition (DATE)", (2018), ISBN: 978-3-9819263-1-6; 917 - 920
Guest Editorial: Special Issue on Low-Power Dependable Computing / D. Zhu, M. Shafique, M. Lin, S. Pasricha / IEEE Transactions on Sustainable Computing, 3 (2018), 3; 137 - 138
Reachability in Parameterized Systems: All Flavors of Threshold Automata / J. Kukovec, I. Konnov, J. Widder / Talk: International Conference on Concurrency Theory (CONCUR), Bejing, China; 2018-09-04 - 2018-09-07; in: "29th International Conference on Concurrency Theory (CONCUR 2018)", Schloss Dagstuhl - Leibniz-Zentrum für Informatik GmbH, Dagstuhl Publishing, 118 (2018), ISBN: 978-3-95977-087-3; 19:1 - 19:17
On Knowledge and Communication Complexity in Distributed Systems / D. Pfleger, U. Schmid / Talk: 25th International Colloquium on Structural Information and Communication Complexity (SIROCCO 2018), Ma'ale HaHamisha, Israel; 2018-06-18 - 2018-06-21; in: "Proceedings 25th International Colloquium on Structural Information and Communication Complexity (SIROCCO 2018)", Springer International Publishing, (2018), ISSN: 0302-9743; 312 - 330
Fast All-Digital Clock Frequency Adaptation Circuit for Voltage Droop Tolerance / M Függer, A. Kinali, C. Lenzen, B. Wiederhake / Talk: 24th IEEE International Symposium on Asynchronous Circuits and Systems, Wien; 2018-05-13 - 2018-05-16; in: "24th IEEE International Symposium on Asynchronous Circuits and Systems", Proceedings of the 24th IEEE International Symposium on Asynchronous Circuits and Systems, (2018), 68 - 77
Tight Bounds for Asymptotic and Approximate Consensus / M Függer, T. Nowak, M. Schwarz / Talk: 37th ACM Symposium on Principles of Distributed Computing (PODC'18), Royal Holloway, University of London, Egham, United Kingdom; 2018-07-23 - 2018-07-27; in: "Proceedings of the 2018 ACM Symposium on Principles of Distributed Computing (PODC '18)", ACM, (2018), ISBN: 978-1-4503-5795-1; 325 - 334
Interpolation for Intermediate Logics via Hyper- and Linear Nested Sequents / R. Kuznets, B. Lellmann / Talk: Advances in Modal Logic 2018, Bern, Schweiz; 2018-08-27 - 2018-08-31; in: "Advances in Modal Logic, Volume 12", G. Bezhanishvili, G. D´Agostino, G Metcalfe, T. Studer (ed.); College Publications, (2018), ISBN: 978-1-84890-255-8; 473 - 492
HW/SW Co-Design and Co-Optimizations for Deep Learning / A. Marchisio, R. Putra, M. Hanif, M. Shafique / Talk: Workshop on INTelligent Embedded Systems Architectures and Applications (INTESA), at the Embedded Systems Week (ESWeek), Turin, Italy; 2018-09-30 - 2018-10-05; in: "Workshop on INTelligent Embedded Systems Architectures and Applications (INTESA), at the Embedded Systems Week (ESWeek)", (2018), ISBN: 978-1-4503-6598-7; 13 - 18
Scalable Dynamic Task Scheduling on Adaptive Many-Core / V. Venkataramani, A. Pathania, M. Shafique, T. Mitra, J. Henkel / Talk: IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), Hanoi, Vietnam; 2018-09-12 - 2018-09-14; in: "IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)", (2018), ISBN: 978-1-5386-6689-0; 168 - 175
An Optimized Partial-Distortion-Elimination Based Sum-of-Absolute-Differences Architecture for High-Efficiency-Video-Coding / P. Selvo, M. Masera, R. Peloso, G. Masera, M. Shafique, M. Martina / Talk: The 6th Conference on Applications in Electronics Pervading Industry, Environment and Society (ApplePies), Pisa, Italy; 2018-09-26 - 2018-09-27; in: "The 6th Conference on Applications in Electronics Pervading Industry, Environment and Society (ApplePies)", (2018), 1 - 6
Intelligent Security Measures for Smart Cyber Physical Systems / M. Shafique, F. Khalid, S. Rehman / Talk: 2018 21st Euromicro Conference on Digital System Design (DSD), Prague, Czech Republic; 2018-08-29 - 2018-08-31; in: "2018 21st Euromicro Conference on Digital System Design (DSD)", (2018), ISBN: 978-1-5386-7376-8; 280 - 287
Robust Machine Learning Systems: Reliability and Security for Deep Neural Networks / M. Hanif, F. Khalid, R. Putra, S. Rehman, M. Shafique / Talk: 24th IEEE International Symposium on On-Line Testing And Robust System Design (IOLTS'18), Platja d'Aro, Spain; 2018-07-02 - 2018-07-04; in: "2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design (IOLTS)", (2018), ISBN: 978-1-5386-5992-2; 257 - 260
Hardware and Software Techniques for Heterogeneous Fault-Tolerance / S. Rehman, F. Kriebel, B. Prabakaran, F. Khalid, M. Shafique / Talk: 2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design (IOLTS), Platja d'Aro, Spain; 2018-07-02 - 2018-07-04; in: "2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design (IOLTS)", (2018), ISBN: 978-1-5386-5992-2; 115 - 118
Robustness for Smart Cyber Physical Systems and Internet-of-Things: From Adaptive Robustness Methods to Reliability and Security for Machine Learning / F. Kriebel, S. Rehman, M. Hanif, F. Khalid, M. Shafique / Talk: 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Hong Kong, China; 2018-07-08 - 2018-07-11; in: "2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)", (2018), ISBN: 978-1-5386-7099-6; 581 - 586
Approximate On-The-Fly Coarse-Grained Reconfigurable Acceleration for General-Purpose Applications / M. Brandalero, A. C. S. Beck, L. Carro, M. Shafique / Talk: 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC), San Fransisco, USA; 2018-06-24 - 2018-06-28; in: "2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)", (2018), ISSN: 0738-100x; 1 - 6
Area-Optimized Low-Latency Approximate Multipliers for FPGA-based Hardware Accelerators / S. Ullah, S. Rehman, B. Prabakaran, F. Kriebel, M. Hanif, M. Shafique, A. Kumar / Talk: 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC), San Fransisco, USA; 2018-06-24 - 2018-06-28; in: "2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)", (2018), ISSN: 0738-100x; 1 - 6
QoS-Aware Stochastic Power Management for Many-Cores / A. Pathania, K. Khdr, M. Shafique, T. Mitra, J. Henkel / Talk: 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC), San Fransisco, USA; 2018-06-24 - 2018-06-28; in: "2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)", (2018), ISSN: 0738-100x; 1 - 6
FPGA-Based Convolutional Neural Network Architecture with Reduced Parameter Requirements / M. Hailesellasie, S. R. Hasan, F. Khalid, F. Awwad, M. Shafique / Talk: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy; 2018-05-27 - 2018-05-30; in: "2018 IEEE International Symposium on Circuits and Systems (ISCAS)", (2018), ISBN: 978-1-5386-4881-0; 1 - 5
Compiler-Driven Error Analysis for Designing Approximate Accelerators / J. Castro-Godinez, S. Esser, M. Shafique, S. Pagani, J. Henkel / Talk: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18), Dresden, Deutschland; 2018-03-19 - 2018-03-23; in: "IEEE/ACM 21st Design, Automation and Test in Europe Conference & Exhibition (DATE)", (2018), ISBN: 978-3-9819263-1-6; 1027 - 1032
Low Power Digital Clock Multipliers for Battery-Operated Internet of Things (IoT) Devices / F. Khalid, S. Nanjiani, S. R. Hasan, O. Hasan, F. Awwad, M. Shafique / Talk: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy; 2018-05-27 - 2018-05-30; in: "2018 IEEE International Symposium on Circuits and Systems (ISCAS)", (2018), ISBN: 978-1-5386-4881-0; 1 - 5
HiMap: A Hierarchical Mapping Approach for Enhancing Lifetime Reliability of Dark Silicon Manycore Systems / V. Rathore, V. Chaturvedi, A. K. Singh, T. Srikanthan, R. R., S.-K. Lam, M. Shafique / Talk: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18), Dresden, Deutschland; 2018-03-19 - 2018-03-23; in: "IEEE/ACM 21st Design, Automation and Test in Europe Conference & Exhibition (DATE)", (2018), ISBN: 978-3-9819263-1-6; 991 - 996
AdAM: Adaptive Approximation Management for the Non-Volatile Memory Hierarchies / M. T. Teimoori, M. Hanif, A. Ejlali, M. Shafique / Talk: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18), Dresden, Deutschland; 2018-03-19 - 2018-03-23; in: "IEEE/ACM 21st Design, Automation and Test in Europe Conference & Exhibition (DATE)", (2018), ISBN: 978-3-9819263-1-6; 785 - 790
PX-CGRA: Polymorphic Approximate Coarse-Grained Reconfigurable Architecture / O. Akbari, M. Kamal, A. Afzali-Kusha, M. Pedram, M. Shafique / Talk: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18), Dresden, Deutschland; 2018-03-19 - 2018-03-23; in: "IEEE/ACM 21st Design, Automation and Test in Europe Conference & Exhibition (DATE)", (2018), ISBN: 978-3-9819263-1-6; 413 - 418
An Overview of Next-Generation Architectures for Machine Learning: Roadmap, Opportunities and Challenges in the IoT Era / M. Shafique, T. Theocharides, C.-S. Bouganis, M. Hanif, F. Khalid, R. Hafiz, S. Rehman / Talk: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18), Dresden, Deutschland; 2018-03-19 - 2018-03-23; in: "IEEE/ACM 21st Design, Automation and Test in Europe Conference (DATE)", (2018), ISBN: 978-3-9819263-1-6; 827 - 832
Verifying nonlinear analog and mixed-signal circuits with inputs / C. Fan, Y. Meng, J. Maier, E. Bartocci, S. Mitra, U. Schmid / Talk: Proc. of ADHS 2018: the 6th IFAC Conference on Analysis and Design of Hybrid Systems, Oxford, UK; 2018-07-11 - 2018-07-13; in: "Proc. of ADHS 2018: the 6th IFAC Conference on Analysis and Design of Hybrid Systems", IFAC-PapersOnLine, 51 / 16 (2018), 241 - 246
Self-Stabilizing High-Speed Communication in Multi-Synchronous GALS Architectures / M. Perner, U. Schmid / Talk: 24th IEEE International Symposium on On-Line Testing And Robust System Design (IOLTS'18), Platja D'Aro, Spain; 2018-07-02 - 2018-07-04; in: "Proceedings 24th IEEE International Symposium on On-Line Testing And Robust System Design (IOLTS'18)", (2018), 157 - 164
On the Strongest Message Adversary for Consensus in Directed Dynamic Networks / U. Schmid, M. Schwarz, K. Winkler / Talk: 25th International Colloquium on Structural Information and Communication Complexity (SIROCCO 2018), Ma'ale HaHamisha, Israel; 2018-06-18 - 2018-06-21; in: "Structural Information and Communication Complexity", Springer International Publishing, (2018), ISSN: 0302-9743; 102 - 120
A Faithful Binary Circuit Model with Adversarial Noise / M Függer, J. Maier, R. Najvirt, T. Nowak, U. Schmid / Talk: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18), Dresden, Deutschland; 2018-03-19 - 2018-03-23; in: "Proceedings of the 2018 Design, Automation & Test in Europe (DATE)", (2018), ISBN: 978-3-9819263-1-6; 1327 - 1332
Parameterized Model Checking of Synchronous Distributed Algorithms by Abstraction / B. Aminof, S. Rubin, I. Stoilkovska, J. Widder, F. Zuleger / Talk: Verification, Model Checking, and Abstract Interpretation (VMCAI), Los Angeles; 2018-01-07 - 2018-01-09; in: "VMCAI", LNCS/Springer, 10747 (2018), 1 - 24

2017

Design Space Exploration and Run-Time Adaptation for Multicore Resource Management Under Performance and Power Constraints / S. Pagani, M. Shafique, J. Henkel / in: "Handbook of Hardware/Software Codesign", Springer Science+Business Media, Dordrecht, 2017, ISBN: 978-94-017-7267-9, 301 - 332
Thermal Safe Power : Efficient Thermal-Aware Power Budgeting for Manycore Systems in Dark Silicon / S. Pagani, K. Khdr, J. Chen, M. Shafique, M. Li, J. Henkel / in: "The Dark Side of Silicon - Energy Efficient Computing in the Dark Silicon Era", Springer International Publishing, Switzerland, 2017, ISBN: 978-3-319-31596-6, 125 - 158
Adroit Use of Dark Silicon for Power, Performance and Reliability Optimisation of NoCs / H. Bokhari, M. Shafique, J. Henkel, S. Parameswaran / in: "The Dark Side of Silicon - Energy Efficient Computing in the Dark Silicon Era", Springer International Publishing, Switzerland, 2017, ISBN: 978-3-319-31596-6, 291 - 325
New transience bounds for max-plus linear systems / B. Charron-Bost, M Függer, T. Nowak / Discrete Applied Mathematics, 219 (2017), 83 - 99
A Model for the Metastability Delay of Sequential Elements / T. Polzer, A. Steininger / Journal of Circuits, Systems, and Computers, 26 (2017), 8; 174001001 - 174001022
Defragmentation of Tasks in Many-Core Architecture / A. Pathania, V. Venkataramani, M. Shafique, T. Mitra, J. Henkel / ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 14 (2017), 1; 2:1 - 2:21
Approximate Networking for Universal Internet Access / J. Qadir, A. Sathiaseelan, U. Farooq, M. Usama, M. Imran, M. Shafique / Future Internet, 9 (2017), 4; 1 - 23
Probabilistic Error Analysis of Approximate Recursive Multipliers / S. Mazahir, O. Hasan, R. Hafiz, M. Shafique / IEEE Transactions on Computers, 66 (2017), 11; 1982 - 1990
Optimal Greedy Algorithm for Many-Core Scheduling / A. Pathania, V. Venkataramani, M. Shafique, T. Mitra, J. Henkel / IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36 (2017), 6; 1054 - 1058
Energy Efficiency for Clustered Heterogeneous Multicores / S. Pagani, A. Pathania, M. Shafique, J. Chen, J. Henkel / IEEE Transactions on Parallel and Distributed Systems, 28 (2017), 5; 1315 - 1330
Computing in the Dark Silicon Era: Current Trends and Research Challenges / M. Shafique, S. Garg / Ieee Design & Test, 34 (2017), 2; 8 - 23
Fine-Grained Checkpoint Recovery for Application-Specific Instruction-Set Processors / T. Li, M. Shafique, J. Ambrose, J. Henkel, S. Parameswaran / IEEE Transactions on Computers, 66 (2017), 4; 647 - 660
Application-Guided Power-Efficient Fault Tolerance for H.264 Context Adaptive Variable Length Coding / M. Shafique, S. Rehman, F. Kriebel, M. Khan, B. Zatt, A. Subramaniyan, B. Vizzotto, J. Henkel / IEEE Transactions on Computers, 66 (2017), 4; 560 - 574
Probabilistic Error Modeling for Approximate Adders / S. Mazahir, O. Hasan, R. Hafiz, M. Shafique, J. Henkel / IEEE Transactions on Computers, 66 (2017), 3; 515 - 530
Thermal Safe Power (TSP): Efficient Power Budgeting for Heterogeneous Manycore Systems in Dark Silicon / S. Pagani, K. Khdr, J. Chen, M. Shafique, M. Li, J. Henkel / IEEE Transactions on Computers, 66 (2017), 1; 147 - 162
Power Density-Aware Resource Management for Heterogeneous Tiled Multicores / K. Khdr, S. Pagani, E. Sousa, V. Lari, A. Pathania, F. Hannig, M. Shafique, J. Teich, J. Henkel / IEEE Transactions on Computers, 66 (2017), 3; 488 - 501
A versatile architecture for long-term monitoring of single-event transient durations / V. S. Veeravalli, A. Steininger, U. Schmid / Microprocessors and Microsystems, 53 (2017), C; 130 - 144
On the completeness of bounded model checking for threshold-based distributed algorithms: Reachability / I. Konnov, H. Veith, J. Widder / Information and Computation, 252 (2017), 95 - 109
Para^2: Parameterized Path Reduction, Acceleration, and SMT for Reachability in Threshold-Guarded Distributed Algorithms / I. Konnov, M. Lazić, H. Veith, J. Widder / Formal Methods in System Design (invited), 51 (2017), 2; 270 - 307
Guest Editors´ Introduction: Computing in the Dark Silicon Era / M. Shafique, S. Garg, V. Chandra / Ieee Design & Test, 34 (2017), 2; 3 pages
Novel Trends in Design & Test / A. Steininger, A. Pawlak, V. Stopjakova / Journal of Circuits, Systems, and Computers, 26 (2017), 80 pages
Measuring Metastability Using a Time-to-Digital Converter / T. Polzer, F. Huemer, A. Steininger / Talk: 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Dresden; 2017-04-19 - 2017-04-21; in: "Proceedings 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems", IEEE Service Center, (2017), ISBN: 978-1-5386-0471-7; Paper ID 55, 6 pages
Measuring Metastability with Free-Running Clocks / R. Najvirt, T. Polzer, A. Steininger / Talk: 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), San Diego, California; 2017-05-21 - 2017-05-24; in: "Proceedings 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017)", IEEE Computer Society, 10662 Los Vaqueros Circle (2017), ISBN: 978-1-5386-2749-5; Paper ID 37, 7 pages
Synthesis of Distributed Algorithms with Parameterized Threshold Guards / M. Lazić, I. Konnov, J. Widder, R. Bloem / Talk: International Conference On Principles Of Distributed Systems (OPODIS), Lissabon; 2017-12-18 - 2017-12-20; in: "OPODIS", LIPIcs-Leibniz International Proceedings in Informatics, (2017), 32:1 - 32:20
QuAd: Design and Analysis of Quality-Area Optimal Low-Latency Approximate Adders / M. Hanif, R. Hafiz, O. Hasan, M. Shafique / Talk: 2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC'17), Austin, Texas, USA; 2017-06-18 - 2017-06-22; in: "Proceedings of the 54th Annual Design Automation Conference (DAC) 2017", ACM, (2017), ISBN: 978-1-4503-4927-7; 42:1 - 42:6
Statistical Error Analysis for Low Power Approximate Adders / M. Ayub, O. Hasan, M. Shafique / Talk: 2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC'17), Austin, Texas, USA; 2017-06-18 - 2017-06-22; in: "Proceedings of the 54th Annual Design Automation Conference (DAC) 2017", ACM, (2017), ISBN: 978-1-4503-4927-7; 75:1 - 75:6
Low-overhead Aging-aware Resource Management on Embedded GPUs / H. Lee, M. Shafique, M. Al Faruque / Talk: 2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC'17), Austin, Texas, USA; 2017-06-18 - 2017-06-22; in: "Proceedings of the 54th Annual Design Automation Conference (DAC) 2017", ACM, (2017), ISBN: 978-1-4503-4927-7; 67:1 - 67:6
Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap / M. Shafique, R. Hafiz, M. Javed, S. Abbas, L. Sekanina, Z. Vasicek, V. Mrazek / Talk: 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'17), 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'17); 2017-07-03 - 2017-07-05; in: "Proceedings of 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'17)", IEEE, (2017), ISSN: 2159-3477; 617 - 632
Setup for an Experimental Study of Radiation Effects in 65nm CMOS / B. Fritz, V. S. Veeravalli, A. Steininger, V. Simek / Talk: 20th Euromicro Conference on Digital System Design, Wien; 2017-08-30 - 2017-09-01; in: "Proceedings of the 20th Euromicro Conference on Digital System Design", (2017), 329 - 336
A Critical Charge Model for Estimating the SET and SEU Sensitivity: A Muller C-Element Case Study / M. Andjelkovic, M. Krstic, R. Kraemer, V. S. Veeravalli, A. Steininger / Talk: The 26th IEEE Asian Test Symposium (ATS´17), Taipei, Taiwan; 2017-11-27 - 2017-11-30; in: "Proceedings of the 26th IEEE Asian Test Symposium (ATS´17)", (2017), 1 - 6
Scalable Probabilistic Power Budgeting for Many-Cores / A. Pathania, K. Khdr, M. Shafique, T. Mitra, J. Henkel / Talk: 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; 2017-03-27 - 2017-03-31; in: "Proceedings of the 2017 Design, Automation & Test in Europe (DATE)", IEEE, (2017), ISSN: 1558-1101; 864 - 869
CAnDy-TM: Comparative Analysis of Dynamic Thermal Management in Many-Cores using Model Checking / S. Bukhari, F. Lodhi, O. Hasan, M. Shafique, J. Henkel / Talk: 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; 2017-03-27 - 2017-03-31; in: "Proceedings of the 2017 Design, Automation & Test in Europe (DATE)", IEEE, (2017), ISSN: 1558-1101; 1289 - 1292
Secure Cyber-Physical Systems: Current Trends, Tools and Open Research Problems / A. Chattopadhyay, A. Prakash, M. Shafique / Talk: 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; 2017-03-27 - 2017-03-31; in: "Proceedings of the 2017 Design, Automation & Test in Europe (DATE)", IEEE, (2017), ISSN: 1558-1101; 1104 - 1109
Embracing Approximate Computing for Energy-Efficient Motion Estimation in High Efficiency Video Coding / W. El-Harouni, S. Rehman, B. Prabakaran, A. Kumar, R. Hafiz, M. Shafique / Talk: 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; 2017-03-27 - 2017-03-31; in: "Proceedings of the 2017 Design, Automation & Test in Europe (DATE)", IEEE, (2017), ISSN: 1558-1101; 1384 - 1389
Soft Error-Aware Architectural Exploration for Designing Reliability Adaptive Cache Hierarchies in Multi-Cores / A. Subramaniyan, S. Rehman, M. Shafique, A. Kumar, J. Henkel / Talk: 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17), Lausanne, Switzerland; 2017-03-27 - 2017-03-31; in: "Proceedings of the 2017 Design, Automation & Test in Europe (DATE)", IEEE, (2017), ISSN: 1558-1101; 37 - 42
A short counterexample property for safety and liveness verification of fault-tolerant distributed algorithms / I. Konnov, M. Lazić, H. Veith, J. Widder / Talk: 44th ACM SIGPLAN Symposium on Principles of Programming Languages (POPL), Paris, France; 2017-01-18 - 2017-01-20; in: "POPL", ACM, Paris (2017), ISBN: 978-1-4503-4660-3; 719 - 734
A Self-Healing Framework for Building Resilient Cyber-Physical Systems / D. Ratasich, O. Höftberger, H. Isakovic, M. Shafique, R. Grosu / Talk: 20th IEEE International Symposium on Real-Time Computing (ISORC 2017), Toronto, Canada; 2017-05-16 - 2017-05-18; in: "Real-Time Distributed Computing (ISORC), 2017 IEEE 20th International Symposium on", IEEE, (2017), ISBN: 978-1-5386-1574-4; 133 - 140
Accuracy of Message Counting Abstraction in Fault-Tolerant Distributed Algorithms / I. Konnov, J. Widder, F. Spegni, L. Spalazzi / Talk: Verification, Model Checking, and Abstract Interpretation (VMCAI), Paris; 2017-01-15 - 2017-01-17; in: "VMCAI 2017: Verification, Model Checking, and Abstract Interpretation", Springer, LNCS/10145/Paris (2017), ISBN: 978-3-319-52233-3; 347 - 366

2016

Scalable Power Management for On-Chip Systems with Malleable Applications / M. Shafique, A. Ivanov, B. Vogel, J. Henkel / IEEE Transactions on Computers, 65 (2016), 11; 3398 - 3412
Task Mapping for Redundant Multithreading in Multi-Cores with Reliability and Performance Heterogeneity / K. Chen, J. Chen, F. Kriebel, S. Rehman, M. Shafique, J. Henkel / IEEE Transactions on Computers, 65 (2016), 11; 3441 - 3454
Content-Aware Low-Power Conﬁgurable Aging Mitigation for SRAM Memories / M. Shafique, M. Usman Karim Khan, J. Henkel / IEEE Transactions on Computers, 65 (2016), 12; 3617 - 3630
Unfaithful Glitch Propagation in Existing Binary Circuit Models / M Függer, T. Nowak, U. Schmid / IEEE Transactions on Computers, 65 (2016), 3; 964 - 978
Decidability of Parameterized Verification / R. Bloem, S. Jacobs, A. Khalimov, I. Konnov, S. Rubin, H. Veith, J. Widder / ACM SIGACT News, 47 (2016), 2; 53 - 64
HEX: Scaling Honeycombs is Easier than Scaling Clock Trees / D. Dolev, M Függer, C. Lenzen, M. Perner, U. Schmid / Journal of Computer and System Sciences, 82 (2016), 5; 929 - 956
Study of a Delayed Single-Event Effect in the Muller C-element / V. S. Veeravalli, A. Steininger / Poster: 21st IEEE European Test Symposium, Amsterdam; 2016-05-24 - 2016-05-27; in: "Proc 21st IEEE European Test Symposium", (2016), ISBN: 978-1-4673-9659-2
Design and Physical Implementation of a Target ASIC for SET Experiments / V. S. Veeravalli, A. Steininger / Poster: 2016 Euromicro Conference on Digital System Design (DSD), Limassol, Portugal; 2016-08-31 - 2016-09-02; in: "Proc. 2016 Euromicro Conference on Digital System Design (DSD)", IEEE, (2016), ISBN: 978-1-5090-2817-7; 694 - 697
A New Coding Scheme for Fault Tolerant 4-Phase Delay-Insensitive Codes / F. Huemer, J. Lechner, A. Steininger / Poster: 2016 IEEE International Conference on Computer Design, Phoenix, Arizona, USA; 2016-10-03 - 2016-10-05; in: "Proceedings 2016 IEEE International Conference on Computer Design", (2016), ISBN: 978-1-5090-5142-7; 392 - 395
A General Approach for Comparing Metastable Behavior of Digital CMOS Gates / T. Polzer, A. Steininger / Talk: 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Kosice, Slovakia; 2016-04-20 - 2016-04-22; in: "Proc 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems", (2016), ISBN: 978-1-5090-2467-4; 6 pages
A Programmable Delay Line for Metastability Characterization in FPGAs / T. Polzer, F. Huemer, A. Steininger / Talk: 24th Austrian Workshop on Microelectronics (Austrochip), Villach; 2016-10-19; in: "Proceedings 24th Austrian Workshop on Microelectronics", (2016), 6 pages
Fault-tolerant Clock Synchronization with High Precision / A. Kinali, F. Huemer, C. Lenzen / Talk: 2016 IEEE Computer Society Annual Symposium on VLSI, Pittsburgh, PA, USA; 2016-07-11 - 2016-07-13; in: "Proc. 2016 IEEE Computer Society Annual Symposium on VLSI", (2016), 490 - 495
Architectural-Space Exploration of Approximate Multipliers / S. Rehman, W. El-Harouni, M. Shafique, A. Kumar, J. Henkel / Talk: The IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Austin, TX, USA; 2016-11-07 - 2016-11-10; in: "ICCAD", ACM New York, NY, USA, (2016), ISBN: 978-1-4503-4466-1
Does Cascading Schmitt-Trigger Stages Improve the Metastable Behavior? / A. Steininger, R. Najvirt, J. Maier / Talk: 2016 Euromicro Conference on Digital System Design (DSD), Limassol, Portugal; 2016-08-31 - 2016-09-02; in: "2016 Euromicro Conference on Digital System Design (DSD)", IEEE, (2016), ISBN: 978-1-5090-2817-7; 372 - 379
The Metastable Behavior of a Schmitt-Trigger / A. Steininger, J. Maier, R. Najvirt / Talk: 22nd IEEE International Symposium on Asynchronous Circuits and Systems, Porto Alegre -- Brazil; 2016-05-08 - 2016-05-11; in: "2016 22nd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)", IEEE Computer Society Conference Publishing Services (CPS), (2016), ISBN: 978-1-4673-9007-1; 57 - 64
A Framework for Connectivity Monitoring in Wireless Sensor Networks / D. Pfleger, U. Schmid / Talk: 10th International Conference on Sensor Technlogies and Applications (SENSORCOMM'16), Nice, France; 2016-07-24 - 2016-07-28; in: "Proceedings 10th International Conference on Sensor Technlogies and Applications (SENSORCOMM'16)", IARIA XPS Press, (2016), ISBN: 978-1-61208-490-9; 40 - 48
Fast, Robust, Quantizable Approximate Consensus / B. Charron-Bost, M Függer, T. Nowak / Talk: International Colloquium on Automata, Languages and Programming (ICALP), Rome, Italy; 2016-07-12 - 2016-07-15; in: "Proceedings 43rd International Colloquium on Automata, Languages, and Programming (ICALP'16)", Leibniz International Proceedings in Informatics (LIPIcs), (2016), ISBN: 978-3-95977-013-2; 1 - 14
Fast Consensus Under Eventually Stabilizing Message Adversaries / M. Schwarz, K. Winkler, U. Schmid / Talk: 17th International Conference on Distributed Computing and Networking, Singapore; 2016-01-04 - 2016-01-07; in: "Proceedings of the 17th International Conference on Distributed Computing and Networking", ACM, (2016), ISBN: 978-1-4503-4032-8; 1 - 10

2015

A Composable Real-Time Architecture for Replicated Railway Applications / S. Resch, A. Steininger, C. Scherrer / Journal of Systems Architecture, 61 (2015), 9; 472 - 485
On the Appropriate Handling of Metastable Voltages in FPGAs / T. Polzer, R. Najvirt, F. Beck, A. Steininger / Journal of Circuits, Systems, and Computers, 25 (2015), 3; 1640020-1 - 1640020-25
Time Complexity of Link Reversal Routing / B. Charron-Bost, M Függer, L. Welch, J. Widder / ACM Transactions on Algorithms, 11 (2015), 3; 1 - 39
Building reliable systems-on-chip in nanoscale technologies / A. Steininger, H. Zimmermann, A. Jantsch, M. Hofbauer, U. Schmid, K. Schweiger, V. S. Veeravalli / E&I Elektrotechnik und Informationstechnik, 132 (2015), 6; 301 - 306
The effect of forgetting on the performance of a synchronizer / M Függer, A. Kößler, T. Nowak, U. Schmid, M. Zeiner / Performance Evaluation, 93 (2015), 1 - 16
Fault-tolerant Distributed Systems in Hardware / D. Dolev, M Függer, C. Lenzen, U. Schmid, A. Steininger / Bulletin of the EATCS, 2 (2015), 116; 43 pages
A Versatile and Reliable Glitch Filter for Clocks / R. Najvirt, A. Steininger / Talk: 25th International Workshop on Power and Timing Modeling, Optimization and Simulation, Salvador, Brasilien; 2015-09-01 - 2015-09-04; in: "25th International Workshop on Power and Timing Modeling, Optimization and Simulation", (2015), 8 pages
Can we trust SET Injection Models? / V. S. Veeravalli, A. Steininger / Talk: MEDIAN Finale Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale, Tallinn, Estonia; 2015-11-10 - 2015-11-11; in: "MEDIAN Finale Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale", (2015), 6 pages
Methods for Analysing and Improving the Fault Resilience of Delay-Insensitive Codes / J. Lechner, A. Steininger, F. Huemer / Talk: 33rd IEEE International Conference on Computer Design, New York City, USA; 2015-10-19 - 2015-10-21; in: "33rd IEEE International Conference on Computer Design", (2015), 8 pages
A Pausible Clock with Crystal Oscillator Accuracy / R. Najvirt, A. Steininger / Talk: 22nd European Conference on Circuit Theory and Design, Trondheium, Norwegen; 2015-08-24 - 2015-08-26; in: "22nd European Conference on Circuit Theory and Design", (2015), Paper ID 67, 4 pages
Reliable and Continuous Measurement of SET Pulse Widths / V. S. Veeravalli, A. Steininger / Talk: 18th Euromicro Conference on Digital System Design, Funchal, Portugal; 2015-08-26 - 2015-08-28; in: "18th Euromicro Conference on Digital System Design", (2015), 8 pages
Enhanced Metastability Characterization based on AC Analysis / T. Polzer, A. Steininger / Talk: 18th Euromicro Conference on Digital System Design, Funchal, Portugal; 2015-08-26 - 2015-08-28; in: "18th Euromicro Conference on Digital System Design", (2015), 9 pages
Measuring the Distribution of Metastable Upsets over Time / T. Polzer, A. Steininger / Talk: 18th Euromicro Conference on Digital System Design, Funchal, Portugal; 2015-08-26 - 2015-08-28; in: "Measuring the Distribution of Metastable Upsets over Time", (2015), 8 pages
Containment of Metastable Voltages in FPGAs / R. Najvirt, T. Polzer, F. Beck, A. Steininger / Talk: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Belgrad; 2015-04-22 - 2015-04-24; in: "18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems", (2015), 6 pages
Revisiting Sorting Network based Completion Detection for 4 Phase Delay Insensitive Codes / F. Huemer, M. Schütz, A. Steininger / Talk: Austrochip Workshop on Microelectronics, Wien; 2015-09-28; in: "Austrochip Workshop on Microelectronics", (2015), 6 pages
How to Synchronize a Pausible Clock to a Reference / R. Najvirt, A. Steininger / Talk: 21st IEEE International Symposium on Asynchronous Circuits and Systems, Mountain View, CA; 2015-05-04 - 2015-05-06; in: "21st IEEE International Symposium on Asynchronous Circuits and Systems", (2015), 8 pages
A Practical Comparison of 2-Phase Delay Insensitve Communication Protocols / M. Schütz, F. Huemer, A. Steininger / Talk: Austrochip Workshop on Microelectronics, Wien; 2015-09-28; in: "Austrochip Workshop on Microelectronics", (2015), 6 pages
Gracefully Degrading Consensus and k-Set Agreement in Directed Dynamic Networks / M. Biely, P. Robinson, U. Schmid, M. Schwarz, K. Winkler / Talk: The international Conference on NETworked sYStems, Agadir, Marokko; 2015-05-13 - 2015-05-15; in: "NETYS2015", Springer LNCS, 9466 (2015), ISBN: 978-3-319-26849-1
Experimental Validation of a Faithful Binary Circuit Model / R. Najvirt, M Függer, T. Nowak, U. Schmid, M. Hofbauer, K. Schweiger / Talk: Great Lakes Symposium on VLSI (GLSVLSI'15), Pittsburgh, Pennsylvania, USA; 2015; in: "Proceedings of the 25th Edition on Great Lakes Symposium on VLSI (GLSVLSI'15)", (2015), ISBN: 978-1-4503-3474-7; 355 - 360
Towards binary circuit models that faithfully capture physical solvability / M Függer, R. Najvirt, T. Nowak, U. Schmid / Talk: Design, Automation & Test in Europe Conference & Exhibition (DATE'15), Grenoble, France; 2015-03-09 - 2015-03-13; in: "Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE'15)", (2015), ISBN: 978-3-9815370-4-8; 1455 - 1460
SMT and POR beat Counter Abstraction: Parameterized Model Checking of Threshold-Based Distributed Algorithms / I. Konnov, H. Veith, J. Widder / Talk: International Conference on Computer Aided Verification (CAV), San Francisco, CA, USA; 2015-07-18 - 2015-07-24; in: "Computer Aided Verification", LNCS Springer, 9206 (2015), ISBN: 978-3-319-21689-8; 85 - 102

2014

The Generalized Loneliness Detector and Weak System Models for k-Set Agreement / M. Biely, P. Robinson, U. Schmid / IEEE Transactions on Parallel and Distributed Systems, 25 (2014), 4; 1078 - 1088
Reconciling fault-tolerant distributed algorithms and real-time computing / H. Moser, U. Schmid / Distributed Computing, 27 (2014), 3; 203 - 230
Fault-tolerant Algorithms for Tick-generation in Asynchronous Logic: Robust Pulse Generation / D. Dolev, M Függer, U. Schmid, C. Lenzen / Journal of the ACM, 61 (2014), 5; 1 - 74
Runtime verification of microcontroller binary code / T. Reinbacher, J. Brauer, M. Horauer, A. Steininger, S. Kowalewski / Science of Computer Programming, 80 (2014), 109 - 129
Rigorously modeling self-stabilizing fault-tolerant circuits: An ultra-robust clocking scheme for systems-on-chip / D. Dolev, M Függer, M. Posch, U. Schmid, A. Steininger, C. Lenzen / Journal of Computer and System Sciences, 80 (2014), 4; 860 - 900
On a family of $q$-binomial distributions / M. Zeiner / Mathematica Slovaca, 64 (2014), 2; 479 - 510
Diagnosis of SET Propagation in Combinational Logic under Dynamic Operation / V. S. Veeravalli, A. Steininger / Poster: 2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10), Stanford University, USA; 2014-04-01 - 2014-04-02; in: "Proceedings 2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10)", (2014), 6 pages
Architecture for Monitoring SET Propagation in 16-bit Sklansky Adder / V. S. Veeravalli, A. Steininger / Poster: 15th International Symposium & Exhibit on Quality Electronic Design, Santa Clara, USA; 2014-03-10 - 2014-03-12; in: "Proceedings 15th International Symposium & Exhibit on Quality Electronic Design", (2014), ISBN: 978-1-4799-3946-6; 8 pages
Online Test Vector Insertion: A Concurrent Built-In Self-Testing (CBIST) Approach for Asynchronous Logic / J. Maier, A. Steininger / Talk: 17th Symposium on Design and Diagnosis of Electronic Circuits and Systems (DDECS 2014), Warschau, Polen; 2014-04-23 - 2014-04-25; in: "Design and Diagnostics of Electronic Circuits Systems (DDECS), 2014 IEEE 17th International Symposium on", (2014), 6 pages
Equivalence of Clock Gating and Synchronization with Applicability to GALS Communication / R. Najvirt, A. Steininger / Talk: 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, Isles Balears, Spain; 2014-09-29 - 2014-10-01; in: "Proceedings of the 24th International Workshop on Power and Timing Modeling, Optimization and Simulation", IEEE, (2014), ISBN: 978-1-4799-5412-4; Paper ID 29, 8 pages
Long Term On-Chip Monitoring of SET Pulsewidths in a Fully Digital ASIC / V. S. Veeravalli, A. Steininger / Talk: 22nd Austrian Workshop on Microelectronics, Graz; 2014-10-09; in: "Proceedings of the 22nd Austrian Workshop on Micorelectronics", IEEE, (2014), ISBN: 978-1-4799-7243-2; Paper ID 24, 6 pages
Exploring the State Dependent SET Sensitivity of Asynchronous Logic - The Muller-Pipeline Example / A. Steininger, V. S. Veeravalli, D. Alexandrescu, E. Costenaro, L. Anghel / Talk: 2014 32nd IEEE International Conference on Computer Design (ICCD), Seoul, Korea; 2014-10-19 - 2014-10-22; in: "Proceedings of the 2014 32nd IEEE International Conference on Computer Design (ICCD)", IEEE, (2014), ISBN: 978-1-4799-6492-5; Paper ID 69, 7 pages
A Tree Arbiter Cell for High Speed Resource Sharing in Asynchronous Environments / S. Naqvi, A. Steininger / Talk: Design Automation &Test in Europe Conference and Exhibition 2014 (DATE 14), Dresden, Deutschland; 2014-03-24 - 2014-03-28; in: "Proceedings Design Automation &Test in Europe", (2014), ISBN: 978-3-9815370-2-4; 6 pages
Single Event Effects in Muller C-Elements and Asynchronous Circuits Over a Wide Energy Spectrum / L. Anghel, V. S. Veeravalli, D. Alexandrescu, A. Steininger, K. Schneider, E. Costenaro / Talk: 2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10), Stanford University, USA; 2014-04-01 - 2014-04-02; in: "Proceedings 2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10)", (2014), 6 pages
Measuring SET Pulsewidths in Logic Gates using Digital Infrastructure / V. S. Veeravalli, A. Steininger, U. Schmid / Talk: 15th International Symposium & Exhibit on Quality Electronic Design, Santa Clara, USA; 2014-03-10 - 2014-03-12; in: "Proceedings 15th International Symposium & Exhibit on Quality Electronic Design", (2014), ISBN: 978-1-4799-3946-6; 7 pages
Protection of Muller-Pipelines from Transient Faults / S. Naqvi, J. Lechner, A. Steininger / Talk: 15th International Symposium & Exhibit on Quality Electronic Design, Santa Clara, USA; 2014-03-10 - 2014-03-12; in: "Proceedings 15th International Symposium & Exhibit on Quality Electronic Design", (2014), ISBN: 978-1-4799-3946-6; 9 pages
A Framework for Automated Competitive Analysis of On-line Scheduling of Firm-Deadline Tasks / A. Pavlogiannis, K. Chatterjee, U. Schmid, A. Kößler / Talk: 35th IEEE Real-Time Systems Symposium, Rome; 2014-12-02 - 2014-12-05; in: "Proccedings IEEE Real-Time Systems Symposium (RTSS'14)", (2014), ISSN: 1052-8725; 118 - 127
Brief Announcement: Gracefully Degrading Consensus and k-Set Agreement under Dynamic Link Failures / M. Schwarz, K. Winkler, U. Schmid, M. Biely, P. Robinson / Talk: 33th ACM SIGACTSIGOPS Symposium on Principles of Distributed Computing (PODC), Paris, France; 2014-07-15 - 2014-07-18; in: "Proceedings of the 33th ACM SIGACTSIGOPS Symposium on Principles of Distributed Computing", ACM, (2014), 341 - 343

2013

Supply Voltage Dependent On-Chip Single-Event Transient Pulse Shape Measurements in 90-nm Bulk CMOS Under Alpha Irradiation / M. Hofbauer, K. Schweiger, H. Zimmermann, U. Giesen, F. Langner, U. Schmid, A. Steininger / IEEE Transactions on Nuclear Science, 60 (2013), 4; 2640 - 2646
An infrastructure for accurate characterization of single-event transients in digital circuits / V. S. Veeravalli, T. Polzer, U. Schmid, A. Steininger, M. Hofbauer, K. Schweiger, H. Dietrich, K. Schneider-Hornstein, H. Zimmermann, K. Voss, B. Merk, M. Hajek / Microprocessors and Microsystems, 37 (2013), 772 - 791
On the performance of a retransmission-based synchronizer / T. Nowak, M Függer, A. Kößler / Theoretical Computer Science, 509 (2013), 25 - 39
Runtime verification of embedded real-time systems / T. Reinbacher, M Függer, J. Brauer / Formal Methods in System Design, Nov 2013 (2013), 10703; 1 - 37
A Generic Architecture for Robust Asynchronous Communication Links / J. Lechner, R. Najvirt / Poster: International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2012, Newcastle upon Tyne; 2012-09-04 - 2012-09-06; in: "Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation", Lecture Notes in Computer Science, 7606 (2013), ISBN: 978-3-642-36156-2; 121 - 130
Classifying Virtual Channel Access Control Schemes for Asynchronous NoCs / R. Najvirt, S. Naqvi, A. Steininger / Talk: 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013), Santa Monica, CA; 2013-05-19 - 2013-05-22; in: "Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on", (2013), ISSN: 1522-8681; 9 pages
An Approach for Efficient Metastability Characterization of FPGAs through the Designer / T. Polzer, A. Steininger / Talk: 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013), Santa Monica, CA; 2013-05-19 - 2013-05-22; in: "19th IEEE International Symposium on Asynchronous Circuits and Systems", (2013), ISSN: 1522-8681; 9 pages
Digital Late-Transition Metastability Simulation Model / T. Polzer, A. Steininger / Talk: 16th Euromicro Conference on Digital System Design (DSD 2013), Santander; 2013-09-04 - 2013-09-06; in: "Proceedings of the 16th Euromicro Conference on Digital System Design", (2013), 8 pages
SET Propagation in Micropipelines / T. Polzer, A. Steininger / Talk: 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013), Karlsruhe; 2013-09-09 - 2013-09-11; in: "23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013)", (2013), 8 pages
Metastability Characterization for Muller C-Elements / T. Polzer, A. Steininger / Talk: 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013), Karlsruhe; 2013-09-09 - 2013-09-11; in: "23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013)", (2013), 8 pages
A Multi-Credit Flow Control Scheme for Asynchronous NoCs / S. Naqvi, R. Najvirt, A. Steininger / Talk: 16th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, Karoly Vary, Czech Republic; 2013-04-08 - 2013-04-10; in: "Proc. 16th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems", (2013), 6 pages
An SET Tolerant Tree Arbiter Cell / S. Naqvi, A. Steininger, J. Lechner / Talk: 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013), Santa Monica, CA; 2013-05-19 - 2013-05-22; in: "Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on", (2013), ISSN: 1522-8681; 9 pages
Performance of Radiation Hardening Techniques under Voltage and Temperature Variations / V. S. Veeravalli, A. Steininger / Talk: 2013 IEEE Aerospace Conference, Big Sky, Montana, USA; 2013-03-02 - 2013-03-09; in: "Proc. 2013 IEEE Aerospace Conference", (2013), 6 pages
Particle Strikes in C-Gates: Relevance of SET Shapes / R. Najvirt, V. S. Veeravalli, A. Steininger / Talk: 2nd Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale, Avignon; 2013-05-30 - 2013-05-31; in: "Proceedings of the MEDIAN Workshop 2013", (2013), 4 pages
Software Composability and Mixed Criticality for Triple Modular Redundant Architectures / S. Resch, A. Steininger, C. Scherrer / Talk: SASSUR Workshop 2013, Toulouse; 2013-09-24; in: "Proceedings of the 2013 SASSUR Workshop", (2013), 4 pages
Efficient Construction of Global Time in SoCs despite Arbitrary Faults / C. Lenzen, M Függer, M. Hofstätter, U. Schmid / Talk: 16th Euromicro Conference on Digital System Design (DSD 2013), Santander, Spain; 2013-09-04 - 2013-09-06; in: "Dependable", Digital System Design (DSD), 2013 Euromicro Conference on, (2013), 142 - 151
Automated Analysis of Real-Time Scheduling using Graph Games / K. Chatterjee, A. Kößler, U. Schmid / Talk: ACM International Conference on Hybrid Systems: Computation and Control, Philadelphia, USA; 2013-04-08 - 2013-04-11; in: "Proceedings 16th ACM International Conference on Hybrid Systems: Computation and Control (HSCC'13)", ACM, (2013), 163 - 172
Byzantine Self-Stabilizing Clock Distribution with HEX: Implementation, Simulation, Clock Multiplication / M. Perner, U. Schmid, C. Lenzen, M. Sigl / Talk: DEPEND 2013, The Sixth International Conference on Dependability, Barcelona, Spain; 2013-08-25 - 2013-08-31; in: "Proceedings of the 6th IARA International Conference on Dependability (DEPEND'13)", IARA, (2013), ISBN: 978-1-61208-301-8; 6 - 15
Unfaithful Glitch Propagation in existing Binary Circuit Models / M Függer, T. Nowak, U. Schmid / Talk: 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013), Santa Monica, CA; 2013-05-19 - 2013-05-22; in: "Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on", (2013), ISSN: 1522-8681; 191 - 199
Transience Bounds for Distributed Algorithms / B. Charron-Bost, M Függer, T. Nowak / Talk: 11th International Conference on Formal Modeling and Analysis of Timed Systems (FORMATS 2013), Buenos Aires, Argentina; 2013-08-29 - 2013-08-31; in: "Formal Modeling and Analysis of Timed Systems", Lecture Notes in Computer Science, 8053 (2013), ISBN: 978-3-642-40228-9; 77 - 90
The Effect of Forgetting on the Performance of a Synchronizer / M Függer, A. Kößler, T. Nowak, U. Schmid, M. Zeiner / Talk: ALGOSENSORS 2013 (9th International Symposium on Algorithms and Experiments for Sensor Systems, Wireless Networks and Distributed Robotics), Sophia Antipolis, France; 2013-09-05 - 2013-09-06; in: "Algorithms for Sensor Systems", (2013), 185 - 200
HEX: Scaling Honeycombs is Easier than Scaling Clock Trees / D. Dolev, C. Lenzen, M Függer, U. Schmid, M. Perner / Talk: SPAA '13, Montreal, Canada; 2013-07-23 - 2013-07-25; in: "Proceedings of the 25th ACM symposium on Parallelism in Algorithms and Architectures", ACM, (2013), ISBN: 978-1-4503-1572-2; 164 - 175
Brief announcement: parameterized model checking of fault-tolerant distributed algorithms by abstraction / A. John, I. Konnov, U. Schmid, H. Veith, J. Widder / Talk: ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing (PODC), Montreal, Kanada; 2013-07-22 - 2013-07-24; in: "PODC", ACM, (2013), ISBN: 978-1-4503-2065-8; 119 - 121
Parameterized model checking of fault-tolerant distributed algorithms by abstraction / A. John, I. Konnov, U. Schmid, H. Veith, J. Widder / Talk: International Conference on Formal Methods in Computer-Aided Design (FMCAD), Portland, OR, USA; 2013-10-20 - 2013-10-23; in: "FMCAD", (2013), ISBN: 978-0-9835678-3-7; 201 - 209
Towards Modeling and Model Checking Fault-Tolerant Distributed Algorithms / A. John, I. Konnov, U. Schmid, H. Veith, J. Widder / Talk: International SPIN Symposium on Model Checking of Software (SPIN), Stony Brook, NY, USA; 2013-07-08 - 2013-07-09; in: "SPIN", LNCS, Springer, 7976 (2013), ISBN: 978-3-642-39175-0; 209 - 226
Muller C-Element Metastability Containment / T. Polzer, A. Steininger, J. Lechner / Talk: International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2012, Newcastle upon Tyne; 2012-09-04 - 2012-09-06; in: "Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation", Lecture Notes in Computer Science, 7606 (2013), ISBN: 978-3-642-36156-2; 103 - 112

2012

Reconciling fault-tolerant distributed computing and systems-on-chip / M Függer, U. Schmid / Distributed Computing, 24 (2012), 6; 323 - 355
Pulse Shape Measurements by On-chip Sense Amplifiers of Single Event Transients Propagating Through a 90 nm Bulk CMOS Inverter Chain / M. Hofbauer, K. Schweiger, H. Dietrich, H. Zimmermann, K.O. Voss, B Merk, U. Schmid, A. Steininger / IEEE Transactions on Nuclear Science, vol 59 (2012), 2778 - 2784
Consensus in the presence of mortal Byzantine faulty processes / J. Widder, M. Biely, G. Gridling, B. Weiss, J. Blanquart / Distributed Computing, 24 (2012), 6; 299 - 321
Supply Voltage Dependent On-chip Single Event Transient Pulse Shape Measurements in 90 nm Bulk CMOS under Alpha Irradiation / M. Hofbauer, K. Schweiger, H. Zimmermann, U. Giesen, F. Langner, U. Schmid, A. Steininger / Poster: 21st European Conference on Radiation and its Effects on Components and Systems (RADECS'12), Biarritz, FRANCE; 2012-09-24 - 2012-09-28; in: "Proceedings 21st European Conference on Radiation and its Effects on Components and Systems (RADECS'12)", (2012)
Reliable Gateway for Radiation Experiments on a VLSI Chip / B. Fritz, V. S. Veeravalli, A. Steininger / Poster: Austrochip 2012, Graz, Austria; 2012-10-10; in: "Austrochip 2012", (2012), 65 - 70
Protecting an Asynchronous NoC against Transient Channel Faults / S. Naqvi, V. S. Veeravalli, A. Steininger / Talk: DSD 2012 (Euromicro Conference on Digital System Design), Cesme, Izmir, Turkey; 2012-09-05 - 2012-09-08; in: "Proc. of 15th Euromicro Conference on Digital System Design", (2012), 8 pages
An Asynchronous Router Architecture using Four-Phase Bundled Handshake Protocol / S. Naqvi / Talk: ICCGI 2012 : The Seventh International Multi-Conference on Computing in the Global Information Technology, Venice, Italy; 2012-06-24 - 2012-06-29; in: "Proc. of The Seventh International Multi-Conference on Computing in the Global Information Technology", (2012), ISBN: 978-1-61208-202-8; 6 pages
Architecture and Design Analysis of a Digital Single-Event Transient/Upset Measurement Chip / V. S. Veeravalli, A. Steininger, U. Schmid, T. Polzer / Talk: 15th Euromicro Symposium on Digital System Design: Architectures, Methods and Tools (DSD 2012), Izmir, Turkey; 2012-09-05 - 2012-09-08; in: "Proceedings 15th Euromicro Symposium on Digital System Design: Architectures, Methods and Tools (DSD'12)", (2012), 8 - 17
Real-Time Runtime Verification on Chip / T. Reinbacher, M Függer, J. Brauer / Talk: RV 2012: the 3rd International Conference on Runtime Verification, Istanbul; 2012-09-25 - 2012-09-28; in: "Proc. of RV 2012: the 3rd International Conference on Runtime Verification", LNCS / Springer, 7687 (2012)
Designing FlexRay-based Automotive Architectures: A Holistic OEM Approach / P. Milbredt, M. Glass, M. Lukasiewycz, A. Steininger, J. Teich / Talk: Design, Automation & Test in Europe Conference & Exhibition (DATE 2012), Dresden, Germany; 2012-03-12 - 2012-03-16; in: "Design, Automation & Test in Europe Conference & Exhibition (DATE 2012) Proceedings", EDAA, (2012), ISBN: 978-3-9810801-8-6; 276 - 279
Efficient Radiation-Hardening of a Muller C-Element / V. S. Veeravalli, A. Steininger / Talk: 2012 Single Event Effects Symposium (SEE 2012), San Diego, USA; 2012-04-03 - 2012-04-05; in: "2012 Single Event Effects Symposium", (2012)
LFSR Implementation Using C-Elements / V. S. Veeravalli, A. Steininger / Talk: MEMICS 2012, Znjomo, Czechia; 2012-10-25 - 2012-10-28; in: "MEMICS 2012", (2012), 73 - 83
Radiation-Tolerant Combinational Gates - An Implementation Based Comparison / V. S. Veeravalli, A. Steininger / Talk: 15th IEEE International Conference on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2012), Tallinn, Estonia; 2012-04-18 - 2012-04-20; in: "Design and Diagnostics of Electronic Circuits Systems (DDECS), 2012 IEEE 15th International Symposium on", (2012), 115 - 120
Monitoring Single Event Transient Effects in Dynamic Mode / V. S. Veeravalli, A. Steininger / Talk: 1st Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2012), Annecy, France; 2012-05-28 - 2012-06-01; in: "1st Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2012)", (2012), 51 - 54
Parallel Runtime Verification of Temporal Properties for Embedded Software / T. Reinbacher, J. Geist, P. Moosbrugger, M. Horauer, A. Steininger / Talk: Mechatronics and Embedded Systems and Applications (MESA), 2012 IEEE/ASME International Conference on, Suzhou, China; 2012-07-08 - 2012-07-10; in: "Mechatronics and Embedded Systems and Applications (MESA), 2012 IEEE/ASME International Conference on", (2012), ISBN: 978-1-4673-2347-5; 224 - 231
A Runtime Verification Unit for Microcontrollers / T. Reinbacher, M. Horauer, A. Steininger / Talk: System, Software, SoC and Silicon Debug Conference (S4D), 2012, Vienna, Austria; 2012-09-19 - 2012-09-20; in: "System, Software, SoC and Silicon Debug Conference (S4D), 2012", (2012), ISSN: 2114-3684; 1 - 6
Agreement in Directed Dynamic Networks / M. Biely, P. Robinson, U. Schmid / Talk: 19th International Colloquium on Structural Information and Communication Complexity (SIROCCO'12), Reykjavik, Iceland; 2012-06-30 - 2012-07-02; in: "Proceedings 19th International Colloquium on Structural Information and Communication Complexity (SIROCCO'12)", (2012), 73 - 84
Protecting Pipelined Asynchronous Communication Channels Against Single Event Upsets / J. Lechner, M. Lampacher / Talk: IEEE 30th International Conference on Computer Design (ICCD 2012), Montreal, Canada; 2012-09-30 - 2012-10-03; in: "Computer Design (ICCD), 2012 IEEE 30th International Conference on", (2012), ISSN: 1063-6404; 480 - 481
A Robust Asynchronous Interfacing Scheme with Four-Phase Dual-Rail Coding / J. Lechner, M. Lampacher, T. Polzer / Talk: 2012 International Conference on Application of Concurrency to System Design (ACSD 2012), Hamburg, Germany; 2012-06-27 - 2012-06-29; in: "Application of Concurrency to System Design (ACSD), 2012 12th International Conference on", (2012), ISSN: 1550-4808; 122 - 131
Designing Robust GALS Circuits with Triple Modular Redundancy / J. Lechner / Talk: 2012 European Dependable Computing Conference (EDCC 2012), Sibiu, Romania; 2012-05-08 - 2012-05-11; in: "Dependable Computing Conference (EDCC), 2012 Ninth European", (2012), 227 - 236
Brief Announcement: The Degrading Effect of Forgetting on a Synchronizer / M Függer, A. Kößler, T. Nowak, M. Zeiner / Talk: 14th International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2012), Toronto, Canada; 2012-10-01 - 2012-10-04; in: "Stabilization, Safety, and Security of Distributed Systems", Lecture Notes in Computer Science, 7596 (2012), ISBN: 978-3-642-33535-8; 90 - 91
Efficient Checking of Link-Reversal-Based Concurrent Systems / M Függer, J. Widder / Talk: International Conference on Concurrency Theory (CONCUR), Newcaslte upon Tyne, UK; 2012-09-03 - 2012-09-08; in: "CONCUR 2012 - Concurrency Theory", Lecture Notes in Computer Science. Springer Verlag., 7454 (2012), ISBN: 978-3-642-32939-5; 486 - 499

2011

VLSI Implementation of a Distributed Algorithm for Fault-Tolerant Clock Generation / A. Steininger, G. Fuchs / Journal of Electrical and Computer Engineering, Clock/Frequency Generation Circuits and Systems (2011), 936712; 23
Synchronous consensus under hybrid process and link failures / M. Biely, U. Schmid, B. Weiss / Theoretical Computer Science, 412 (2011), 40; 5602 - 5630
The Asynchronous Bounded-Cycle Model / P. Robinson, U. Schmid / Theoretical Computer Science, 412 (2011), 40; 5580 - 5601
Replicated processors on a single die - How independently do they fail? / A. Steininger, P Tummeltshammer / Journal e&i: Elektrotechnik und Informationstechnik, 128 (2011), 245 - 250
On Self-Timed Circuits in Real-Time Systems / M. Ferringer / International Journal of Reconfigurable Computing, 2011 (2011), 972375
Past time LTL runtime verification for microcontroller binary code / T. Reinbacher, J. Brauer, M. Horauer, A. Steininger, S. Kowalewski / Talk: FMICS 2011, Trento; 2011-08-29 - 2011-08-30; in: "Formal Methods for Industrial Critical Systems", Springer Berlin / Heidelberg, (2011), ISBN: 978-3-642-24430-8; 37 - 51
Automated test-trace inspection for microcontroller binary code / T. Reinbacher, J. Brauer, D. Schachinger, A. Steininger, S. Kowalewski / Talk: 2nd International Conference on Runtime Verification (RV 2011), San Francisco; 2011-09-27 - 2011-09-30; in: "Runtime Verification", (2011), 239 - 244
Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems / M. Biely, P. Robinson, U. Schmid / Talk: International Conference On Principles Of Distributed Systems (OPODIS), Toulouse; 2011-12-12 - 2011-12-16; in: "OPODIS'11", Springer Berlin / Heidelberg, (2011), 299 - 312
Reconciling Fault-Tolerant Distributed Algorithms and Real-Time Computing / H. Moser, U. Schmid / Talk: Structural Information and Communication Complexity, Gdansk; 2011-06-26 - 2011-06-29; in: "Proceedings 18th International Colloquium on Structural Information and Communication Complexity (SIROCCO'11)", Springer Berlin / Heidelberg, (2011), ISBN: 978-3-642-22211-5; 42 - 53
Solving k-Set Agreement with Stable Skeleton Graphs / M. Biely, P. Robinson, U. Schmid / Talk: International Parallel and Distributed Processing Symposium (IPDPS), Anachorage, Alaska; 2011-05-16 - 2011-05-20; in: "IPDPS Workshops", (2011), ISBN: 978-1-61284-425-1; 1488 - 1495
Conversion and Interfacing Techniques for Asynchronous Circuits / M. Ferringer / Talk: 14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2011), Cottbus, Germany; 2011-04-13 - 2011-04-15; in: "Design and Diagnostics of Electronic Circuits & Systems", (2011), ISBN: 978-1-4244-9755-3; 11 - 16
Brief announcement: full reversal routing as a linear dynamical system / B. Charron-Bost, M Függer, L. Welch, J. Widder / Talk: SPAA '11, San Jose, California, USA; 2011-06-04 - 2011-06-06; in: "Proceedings of the 23rd ACM symposium on Parallelism in algorithms and architectures", ACM, (2011), ISBN: 978-1-4503-0743-7; 129 - 130
Full Reversal Routing as a Linear Dynamical System / B. Charron-Bost, M Függer, L. Welch, J. Widder / Talk: Structural Information and Communication Complexity, Gdansk; 2011-06-26 - 2011-06-29; in: "Structural Information and Communication Complexity", Springer Berlin / Heidelberg, (2011), ISBN: 978-3-642-22211-5; 101 - 112
Partial is Full / B. Charron-Bost, M Függer, L. Welch, J. Widder / Talk: Structural Information and Communication Complexity, Gdansk; 2011-06-26 - 2011-06-29; in: "Structural Information and Communication Complexity", Springer Berlin / Heidelberg, (2011), ISBN: 978-3-642-22211-5; 113 - 124
Fault-Tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation [Extended Abstract] / D. Dolev, M Függer, C. Lenzen, U. Schmid / Talk: Stabilization, Safety, and Security of Distributed Systems, Grenoble, France; 2011-10-10 - 2011-10-12; in: "Stabilization, Safety, and Security of Distributed Systems", Springer Berlin / Heidelberg, (2011), ISBN: 978-3642051173; 163 - 177
Investigating the Impact of Process Variations on an Asynchronous Time-Triggered-Protocol Controller / M. Ferringer / Talk: Dependable Systems and Networks Workshops (DSN-W), 2011 IEEE/IFIP 41st International Conference on, Hong-Kong; 2011-06-27 - 2011-06-30; in: "Dependable Systems and Networks Workshops", (2011), ISBN: 978-1-4577-0374-4; 47 - 52
Conversion of Two- to Four-Phase Delay-Insensitive Asynchronous Circuits / M. Ferringer / Talk: EUROCON 2011, Lisbon; 2011-04-27 - 2011-04-29; in: "EUROCON - International Conference on Computer as a Tool (EUROCON), 2011 IEEE", (2011), ISBN: 978-1-4244-7486-8; 1 - 4
Testing microcontroller software simulators / T. Reinbacher, D. Gückel, M. Horauer / Talk: WS4C 2011, Berlin; 2011-10-04 - 2011-10-07; in: "Workshop on Software Language Engineering for Cyber-physical Systems", (2011)
Hardware support for efficient testing of embedded software / T. Reinbacher, A. Steininger, T. Müller, M. Horauer, J. Brauer, S. Kowalewski / Talk: The 7th ASME/IEEE International Conference on Mechatronic and Embedded Systems and Applications, Washington; 2011-08-29 - 2011-08-31; in: "International Conference on Mechatronic and Embedded Systems and Applications", ASME, (2011)
Precise control flow reconstruction using boolean logic / T. Reinbacher, J. Brauer / Talk: EMSOFT2011, ACM international conference on Embedded software, Taipei; 2011-10-09 - 2011-10-14; in: "EMSOFT '11 Proceedings of the ninth ACM international conference on Embedded software", ACM New York, (2011), ISBN: 978-1-4503-0714-7; 117 - 126
On the Performance of a Retransmission-Based Synchronizer / T. Nowak, M Függer, A. Kößler / Talk: Structural Information and Communication Complexity, Gdansk; 2011-06-26 - 2011-06-29; in: "Structural Information and Communication Complexity", Springer Berlin / Heidelberg, (2011), ISBN: 978-3-642-22211-5; 234 - 245

2010

Topology Control for Fault-Tolerant Communication in Wireless Ad Hoc Networks / B. Thallner, H. Moser, U. Schmid / Wireless Networks, 16 (2010), 21; 388 - 404
In search of lost time / B. Charron-Bost, M. Hutle, J. Widder / Information Processing Letters, 110 (2010), 21; 928 - 933
A New Robust Interference Reduction Scheme for Low Complexity Direct-Sequence Spread-Spectrum Receivers: Optimization / A. Goiser, S. Khattab, G. Fassl, U. Schmid / in: "CTRQ-2010", issued by: IEEE-Explore; IEEE Computer Society, 2010, ISBN: 978-0-7695-4070-2, 5 pages
Enhancing Pipelined Processor Architectures with Fast Autonomous Recovery of Transient Faults / M. Jeitler, J. Lechner, A. Steininger / Poster: DDECS 2010 (Design and Diagnostics of Electronic Circuits and Systems), Vienna, Austria; 2010-04-14 - 2010-04-16; in: "13th IEEE International Symposium On Design And Diagnostics Of Electronic Cicruits And Systems", IEEE Computer Society, (2010), ISBN: 9781424466108; 233 - 236
Test-Case Generation for Embedded Binary Code Using Abstract Interpretation / T. Reinbacher, J. Brauer, M. Horauer, A. Steininger, S. Kowalewski / Talk: MEMICS 2010 (Mathematical and Engineering Methods in Computer Science), Mikulov, Czech Republic; 2010-10-22 - 2010-10-24; in: "MEMICS proceedings", (2010), 151 - 158
Reliability Estimation and Experimental Results of a Self-Healing Asynchronous Circuit: A Case Study / W. Friesenbichler, T. Panhofer, A. Steininger / Talk: NASA/ESA 2010 (Conference on Adaptive Hardware and Systems), Anaheim, CA, USA; 2010-06-15 - 2010-06-18; in: "NASA/ESA 2010 Proceedings", IEEE Computer Society, (2010), ISBN: 9781424458882; 97 - 104
Implementation of Self-Healing Asynchronous Circuits at the Example of a Video-Processing Algorithm / W. Friesenbichler, T. Panhofer, A. Steininger / Talk: WSDN 2010 (4th Workshop on Dependable and Secure Nanocomputing, Chicago, IL, USA; 2010-06-28 - 2010-07-01; in: "WSDN - Full Program", IEEE Computer Socitey, (2010), ISBN: 9781424477289; 129 - 134
A Deterministic Approach for Hardware Fault Injection in Asynchronous QDI Logic / W. Friesenbichler, T. Panhofer, A. Steininger / Talk: DDECS 2010 (Design and Diagnostics of Electronic Circuits and Systems), Vienna, Austria; 2010-04-14 - 2010-04-16; in: "13th IEEE International Symposium On Design And Diagnostics Of Electronic Cicruits And Systems", IEEE, (2010), ISBN: 9781424466108; 317 - 322
Regional Consecutive Leader Election in Mobile Ad-Hoc Networks / H. Chung, P. Robinson, L. Welch / Talk: ACM SIGACT/SIGMOBILE (International Workshop on FOUNDATIONS OF MOBILE COUMPUTING), Cambridge, Massachusetts, USA; 2010-09-16; in: "Proceedings of the 6th International Workshop on Foundations of Mobile Computing", ACM, (2010), ISBN: 9781450304139; 81 - 90
Brief Announcement: Regional Consecutive Leader Election in Mobile Ad-Hoc Networks / H. Chung, P. Robinson, L. Welch / Talk: ALGOSENSORS 2010 (6th International Workshop on Algorithmic Aspects of Wireless Sensor Networks), Bordeaux, France; 2010-07-05; in: "Algorithms for Sensor Systems - LNCS", Springer, 6451/2010 (2010), ISBN: 9783642169878; 90 - 91
Real-Time Analysis of Round-based Distributed Algorithms / A. Kößler, H. Moser, U. Schmid / Talk: RTSOPS 2010 (1st International Real-Time Scheduling Open Problems Seminar), Brussels, Belgium; 2010-07-06 - 2010-07-09; in: "Proceedings of the 1st International Real-Time Scheduling Open Problems Seminar", (2010), 9 - 11
Investigating Self-Timed Circuits for the Time-Triggered Protocol / M. Ferringer / Talk: 5th International Workshop on Reconfigurable Communication Centric System-on-Chips, Workshop Proceedings (ReCoSoC), Karlsruhe, Germany; 2010-05-17 - 2010-05-19; in: "Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip 2010", KIT Scientific Publishing - DFG, (2010), ISBN: 9783866445154; 101 - 108
Towards self-timed logic in the Time-Triggered Protocol / M. Ferringer / Talk: DSN 2010 (International Conference on Dependable Systems and Networks), Chicago, IL, USA; 2010-04-28 - 2010-04-30; in: "DSN 2010 - Full Program", IEEE Computer Society, (2010), ISBN: 9781424477289; 136 - 141
How to Speed-Up Fault-Tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining / M Függer, A. Dielacher, U. Schmid / Talk: EDCC - 8 (European Dependable Computing Conference), Valencia, Spain; 2010-04-28 - 2010-04-30; in: "Proceedings of the Eight European Dependable Computing Conference", IEEE Computer Society, (2010), ISBN: 9780769540078; 230 - 239
Low Latency Recovery from Transient Faults for Pipelined Processor Architectures / M. Jeitler, J. Lechner / Talk: DSD 2010 (Euromicro Conference on Digital System Design), Lille, France; 2010-09-01 - 2010-09-03; in: "Proceedings DSD 2010 (Euromicro Conference on Digital System Design)", IEEE Computer Society, (2010), ISBN: 9780769541716; 219 - 225

2009

Is Asynchronous Logic More Robust Than Synchronous Logic? / B. Rahbaran, A. Steininger / IEEE Transactions on Dependable and Secure Computing, 6 (2009), 4; 282 - 294
Safely Stimulating the Clock Synchronization Algorithm in Time-Triggered Systems - A Combined Formal and Experimental Approach / M Függer, A. Steininger, E. Armengaud / IEEE Transactions on Industrial Informatics, 5 (2009), 2; 132 - 145
Impossibility Results and Lower Bounds For Consensus Under Link Failures / U. Schmid, B. Weiss, I. Keidar / SIAM JOURNAL ON COMPUTING, 38 (2009), 5; 1912 - 1951
Chasing the Weakest System Model for Implementing Omega and Consensus / M. Hutle, D. Malkhi, U. Schmid, L. Zhou / IEEE Transactions on Dependable and Secure Computing, 6 (2009), 4; 269 - 279
Optimal Message-Driven Implementations of Omega with Mute Processes / J. Widder, M. Biely / ACM Transactions on Autonomous and Adaptive Systems., 4 (2009), 1; ?
The Theta-Model: achieving synchrony without clocks / J. Widder, U. Schmid / Distributed Computing, 22 (2009), 1; 29 - 47
Speeding up Fault Injection for Asynchronous Logic by FPGA-based Emulation / M. Jeitler, J. Lechner / Poster: ReConFig 2009 (International Conference on ReConFigurable Computing and FPGAs), Cancun, Quintana Roo, Mexico; 2009-12-09 - 2009-12-11; in: "ReConFig'09", CPS, (2009), ISBN: 9780769539171; 65 - 70
Coupling Asynchronous Signals into Asynchronous Logic / M. Ferringer / Poster: Austrochip, Graz, Austria; 2009-09-07 - 2009-09-08; in: "Austrochip", Institut für Elektronik - TU Graz, (2009), ISBN: 978-3-9501635-1-3; 97 - 102
Consensus When All Processes May Be Byzantine for Some Time / M. Biely, M. Hutle / Talk: 11th International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2009), Lyon; 2009-11-03 - 2009-11-06; in: "Stabilization, Safety, and Security of Distributed Systems", Lecture Notes in Conputer Science / Springer Verlag, 5873 (2009), ISBN: 978-3-642-05117-3; 120 - 132
Weak Synchrony Models and Failure Detectors for Message Passing (k-)Set Agreement / M. Biely, P. Robinson, U. Schmid / Talk: OPODIS 2009 (International Conference On Principles Of Distributed Systems), Nimes, France; 2009-12-15 - 2009-12-18; in: "LNCS Proceedings", Springer, 5923/2009 (2009), ISBN: 9783642108761; 285 - 299
Implications of VLSI Fault Models and Distributed Systems Failure Models --- A Hardware Designer's View / G. Fuchs / Talk: Dagstuhl Seminar 08371 : Fault-Tolerant Distributed Algorithms on VLSI Chips, Dagstuhl, Germany; 2009-09-07 - 2009-09-10; in: "Fault-Tolerant Distributed Algorithms on VLSI Chips", Leibniz Zentrum Informatik, 08371 (2009), ISSN: 1862-4405; ?
Remote Measurement of Local Oscillator Drifts in FlexRay Networks / E. Armengaud, A. Steininger / Talk: DATE 2009 (Design, Automation and Test in Europe), Nice, France; 2009-04-20 - 2009-04-24; in: "DATE09", Springer, (2009), ISBN: 9783981080155; 1082 - 1087
On the Risk of Fault Coupling over the Chip Substrate / P Tummeltshammer, A. Steininger / Talk: DSD 2009 (Euromicro Conference on Digital System Design), Patras, Greece; 2009-08-27 - 2009-08-29; in: "12th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - Architectures, Methods and Tools - DSD2009", IEEE Computer Society, (2009), ISBN: 9780769537825; 325 - 332
Soft Error Tolerant Asynchronous Circuits based on Dual Redundant Four State Logic / W. Friesenbichler, A. Steininger / Talk: DSD 2009 (Euromicro Conference on Digital System Design), Patras, Greece; 2009-08-27 - 2009-08-29; in: "12th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - Architectures, Methods and Tools - DSD 2009", IEEE Computer Society, (2009), ISBN: 9780769537825; 100 - 107
Brief Announcment: Weak Synchrony Models and Failure Detectors for Message Passing (k-)Set Agreement* / P. Robinson, M. Biely, U. Schmid / Talk: DISC 2009 (International Symposium on Distributed Computing), Elche, Spain; 2009-09-23 - 2009-09-25; in: "Distribiuted Computing", Springer, 5805/2009 (2009), ISBN: 978-3-642-04354-3; 360 - 361
ARROW - A Generic Hardware Fault Injection Tool for NoCs / M. Birner, T. Handl / Talk: DSD 2009 (Euromicro Conference on Digital System Design), Patras, Greece; 2009-08-27 - 2009-08-29; in: "12th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - Architectures, Methods and Tools - DSD 2009", IEEE Computer Society, (2009), ISBN: 978-0-7695-3782-5; 465 - 472
Routing without Ordering / B. Charron-Bost, A. Gaillard, L. Welch, J. Widder / Talk: SPAA 2009 (Parallelism in Algorithms and Architectures), Calgary, Alberta, Canada; 2009-08-11 - 2009-08-13; in: "Proceedings of the Twenty-First Annual Symposium on Parallelism in Algorithms and Architectures", ACM, (2009), ISBN: 978-1-60558-606-9; 145 - 153
Comparing the Robustness of Synchronous and Asynchronous Circuits by Fault Injection / M. Jeitler, J. Lechner / Talk: MEMICS 2009 (Mathematical and Engineering Methods in Computer Science), Znojmo; 2009-11-13 - 2009-11-15; in: "MEMICS 2009 proceedings", Universität Brno, (2009), ISBN: 9788087342046; 110 - 117
Fuse - A Hardware Accelerated Hdl Fault Injection Tool / M. Jeitler, M. Delvai, S. Reichör / Talk: SPL 2009 (Southern Conference on Programmable Logic), Sao Carlos, Brazil; 2009-04-01 - 2009-04-03; in: "2009", IEEE, (2009), ISBN: 9781424438464; 89 - 94
Error Containment in the Presence of Metastability / A. Steininger / Talk: Dagstuhl Seminar 08371 : Fault-Tolerant Distributed Algorithms on VLSI Chips, Dagstuhl, Germany (invited); 2009-09-07 - 2009-09-10; in: "Fault-Tolerant Distributed Algorithms on VLSI Chips", Leibniz Zentrum Informatik, 08371 (2009), ISSN: 1862-4405; ?
On the Stability and Robustness of Non-Synchronous Circuits with Timing Loops / M Függer, G. Fuchs, A. Steininger / Talk: WSDN 2009 (Workshop on Dependable and Secure Nanocomputing, Estoril, Lisbon, Portugal; 2009-06-29 - 2009-06-30; in: "WSDN 2009", Springer, (2009), ISBN: 9781424444212; 45 - 50
How to Speed-up Fault-tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining / A. Dielacher, M Függer / Talk: PODC 2009 (Principles of Distribiuted Computing), Alberta, Canada (invited); 2009-08-10 - 2009-08-12; in: "PODC'09", ACM, (2009), ISBN: 9781605583969; 276 - 277
On the Threat of Metastability in an Asynchronous Fault-Tolerant Clock Generation Scheme / G. Fuchs, M Függer, A. Steininger / Talk: ASYNC 2009 (International Symposium on Asynchronous Circuits and Systems), Chapel Hill, North Carolina; 2009-05-17 - 2009-05-20; in: "ASYNC 2009", IEEE Computer Society, (2009), ISSN: 1522-8681; 127 - 136
Power Supply Induced Common Cause Faults - Experimental Assessment of Potential Countermeasures / P Tummeltshammer, A. Steininger / Talk: DSN 2009 (International Conference on Dependable Systems and Networks), Estoril, Portugal; 2009-06-29 - 2009-07-02; in: "DSN 2009 - Full Program", Springer, (2009), ISBN: 9781424444212; 449 - 457
On the Role of the Power Supply as an Entry for Common Cause Faults - An Experimental Analysis / P Tummeltshammer, A. Steininger / Talk: DDECS 2009 (Design and Diagnostics of Electronic Circuits and Systems), Liberec, Czech Republic; 2009-04-15 - 2009-04-17; in: "2009 IEEE Design and Diagnostics of Electronic Circuits and Systems", IEEE, 00 (2009), ISBN: 9781424433414; 152 - 157
Link Reversal: How to Play Better to Work Less / B. Charron-Bost, L. Welch, J. Widder / Talk: ALGOSENSORS 2009 (5th International Workshop on Algorithmic Aspects of Wireless Sensor Networks), Rhodes, Greece; 2009-07-10 - 2009-07-11; in: "Algorithmic Aspects of Wireless Sensor Networks", Springer, 5304/2008 (2009), ISBN: 9783642054334; 88 - 110
A Metastability-Free Multi-synchronous Communication Scheme for SoCs / T. Polzer, T. Handl, A. Steininger / Talk: SSS 2009 (Symposium on Stabilization, Safety, and Security of Distributed Systems), Lyon, France; 2009-11-03 - 2009-11-06; in: "Stabilization, Safety, and Security of Distribiuted Systems", Springer, 5873/2009 (2009), ISBN: 978-3642051173; 578 - 592

2008

Towards a Systematic Test for Embedded Automotive Communication Systems / E. Armengaud, A. Steininger, M. Horauer / IEEE Transactions on Industrial Informatics, 4 (2008), 3; 145 - 208
Towards a real-time distribiuted computing model / H. Moser / Theoretical Computer Science, 410 (2008), 6-7; 631 - 659
An Object-oriented DEV Approach to ARGESIM Benchmark C16 `Restaurant Business Dynamics´ using Enterprise Dynamics / S. Tauböck, P. Jahn, T. Polzer, A. Schuster / Simulation News Europe SNE, 18 (2008), 1; 41 - 42
Statechart Modelling for ARGESIM Benchmark C10 `Dining Philosophers Problem II´ using Simulink/Stateflow / V. Legourski, Y. Huang, O. Cevan, F. Breitenecker / Simulation News Europe SNE, 18 (2008), 1; 39 - 40
An Object-oriented Solution to ARGESIM Benchmark C4 `Dining Philosophers Problem´ implemented with AnyLogic / M. Gyimesi, A. Dielacher, T. Handl, C. Wittmann / Simulation News Europe SNE, 18 (2008), 1; 31 - 32
Implementation of a Design Tool for Automated Generation of Four State Logic Circuits / J. Lechner, M. Delvai / Poster: Junior Scientist Conference 2008, Wien; 2008-11-16 - 2008-11-18; in: "Proceedings of the Junior Scientist Conference 2008", (2008), ISBN: 978-3-200-01612-5; 85 - 86
Exploring the Usefulness of the Gate-level Stuck-at Fault Model for Muller C-Elements / J. Grahsl, T. Handl, A. Steininger / Poster: 20. GI/ITG/GMM Workshop Testmethoden und Vuverlässigkeit von Schaltungen und Systemen, Wien; 2008-02-24 - 2008-02-26; in: "20. Workshop Testmethoden und Vuverlässigkeit von Schaltungen und Systemen", (2008), 165 - 169
Fault Tolerant Four-State Logic by Using Self-Healing Cells / T. Panhofer, W. Friesenbichler, M. Delvai / Talk: 2008 IEEE International Conference on Computer Design, Lake Tahoe, CA, USA; 2008-10-12 - 2008-10-15; in: "2008 IEEE International Conference on Computer Design", IEEE, (2008), ISBN: 978-1-4244-2658-4; 6 pages
Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip / G. Fuchs, M Függer, U. Schmid, A. Steininger / Talk: 11th EUROMICRO Conference on Digital System Design (DSD 2008), Parma, Italien; 2008-09-03 - 2008-09-05; in: "11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, DSD 2008.", IEEE, (2008), ISBN: 978-0-7695-3277-6; 242 - 249
A Concept for Hybrid Fault Injection in Distributed Systems / C. Trödhandl, B. Weiss / Talk: Testing: Academic and Industrial Conference --- Practice and Research Techniques, Windsor, United Kingdom; 2008-08-29 - 2008-08-31; in: "Testing: Academic and Industrial Conference --- Practice and Research Techniques (Fast Abstracts)", (2008)
Automated Testing of FlexRay Clusters for System Inconsistencies in Automotive Networks / P. Milbredt, A. Steininger, M. Horauer / Talk: IEEE International Workshop on Electronic Design, Test and Applications, Hong-Kong; 2008-05-23 - 2008-05-25; in: "4th IEEE International Symposium on Electronic Design, Test and Applications, 2008. DELTA 2008.", (2008), ISBN: 978-0-7695-3110-6; 533 - 538
An Investigation of the Clique Problem in Flex Ray / P. Milbredt, M. Horauer, A. Steininger / Talk: SIES´2008 Third international symposium on industrial embedded systems, Montpellier - La Grande Motte, France; 2008-08-11 - 2008-08-13; in: "International Symposium on Industrial Embedded Systems, 2008.", (2008), ISBN: 978-1-4244-1995-1; 200 - 207
Extending two non-parametric transforms for FPGA based stereo matching using bayer filtered cameras / K. Ambrosch, M. Humenberger, W. Kubinger, A. Steininger / Talk: IEEE Conference on Computer Vision and Pattern Recognition, 2008. CVPR '08, Anchorage, Alaska, USA; 2008-06-23 - 2008-06-28; in: "CVPR Workshops 2008. IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops, 2008.", (2008), ISBN: 978-1-4244-2339-2; 1 - 8
Exploring Hardware Software Partitioning on the Example of a Fingerprint Verification System / S. Hepp, G. Klima, A. Kadlec, L. Krammer, W. Luckner, D. Prokesch, S. Resch, A. Wasicek, J. Wilhelm, P Tummeltshammer, M. Delvai / Talk: 16th Austrian Workshop on Microelectronics (Austrochip), Linz; 2008-10-08; in: "Proc. of the 16th Austrian Workshop on Microelectronics 2008", (2008), 7 - 12
Optimal Deterministic Remote Clock Estimation in Real-Time Systems / H. Moser, U. Schmid / Talk: 12th International Conference On Principles of Distributed Systems, Luxor, Ägypten; 2008-12-15 - 2008-12-18; in: "Principles of Distributed Systems", Lecture Notes in Computer Science / Springer Verlag, Volume 5401 (2008), ISBN: 978-3-540-92220-9; 363 - 387
An Operating System for a Time-Predictable Computing Node / G. Khyo, P. Puschner, M. Delvai / Talk: The 6th IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2008), Capri, Italien; 2008-10-01 - 2008-10-03; in: "Software Technologies for Embedded and Ubiquitous Systems", Lecture Notes in Computer Science / Springer Verlag, 5287 (2008), ISBN: 978-3-540-87784-4; 150 - 161
Improving Fault Tolerance by Using Reconﬁgurable Asynchronous Circuits / W. Friesenbichler, T. Panhofer, M. Delvai / Talk: 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, 2008, Bratislava, Slovakia; 2008-04-16 - 2008-04-18; in: "Design and Diagnostics of Electronic Circuits and Systems, 2008. DDECS 2008. 11th IEEE Workshop on", IEEE, (2008), ISBN: 978-1-4244-2276-0; 267 - 270
Safe deterministic replay for stimulating the clock synchronization algorithm in time-triggered systems / E. Armengaud, M Függer, A. Steininger / Talk: WFCS, Dresden, Germany; 2008-05-20 - 2008-05-23; in: "IEEE International Workshop on Factory Communication Systems, 2008. WFCS 2008.", (2008), ISBN: 978-1-4244-2349-1; 277 - 286
The Asynchronous Bounded Cycle Model / P. Robinson, U. Schmid / Talk: 10 International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2008), Detroit, USA; 2008-11-21 - 2008-11-23; in: "Stabilization, Safety, and Security of Distributed Systems", Lecture Notes in Conputer Science / Springer Verlag, 5340 (2008), ISSN: 0302-9743; 246 - 262
Brief Announcement: The Asynchronous Bounded Cycle Model / U. Schmid, P. Robinson / Talk: ACM Symposium on Principles of Distributed Computing, Toronto, Canada; 2008-08-18 - 2008-08-21; in: "PODC'08 Proceedings of the 27th Annual ACM Symposium on Principles of Distributed Computing", Association for Computing Machinery (ACM), (2008), ISBN: 978-1-59593-989-0; 423
Automated Generation of Explicit Connectors for Component Based Hardware/Software Interaction in Embedded Real-Time Systems / W. Forster, C. Kutschera, A. Steininger, K. Göschka / Talk: 16th International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS 2008), (IPDPS 2008), Miami, Florida, USA; 2008-04-14; in: "Proceedings of the 16th International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS 2008), (IPDPS 2008)", IEEE Computer Society, (2008), ISBN: 978-1-4244-1694-3; 1 - 8

2007

Booting Clock Synchronization in Partially Synchronous Systems with Hybrid Process and Link Failures / J. Widder, U. Schmid / in: "Distributed Computing", Springer-Verlag, 2007, 115 - 140
Time-Multiplexed Multiple Constant Multiplication / P Tummeltshammer, J.C Hoe, M. Pueschel / in: "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems", IEEE, 2007, 1551 - 1563
FIT-IT Projekt DARTS: Dezentrale fehlertolerante Taktgenerierung / U. Schmid, A. Steininger, M. Sust / Elektrotechnik und Informationstechnik (e&i), Heft 1-2 (2007), 3 - 8
A Novel Interconnection Approach for Globally Asynchronous Locally Synchronous Circuits / E. Armengaud, W. Forster / Poster: Austrochip, Graz; 2007-10-11; in: "Austrochip - Workshop on Microelectronics", (2007), 107 - 113
SELF-HEALING CIRCUITS FOR SPACE-APPLICATIONS / M. Delvai, T. Panhofer / Poster: 17th International Conference on Field Programmable Logic and Applications (FPL2007), Amsterdam; 2007-08-27 - 2007-08-29; in: "Proceedings of 17th INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS", (2007), ISBN: 1-4244-1060-6; 505 - 506
Exploring Hardware Software Partitioning on the Example of a Face Recognition System / C. Angerer, O. Cevan, L. Fauster, Y. Huang, B. Huber, V. Legourski, S. Pirker, T. Polzer, D. Reichhard, D. Rigler, A. Schuster, B. Weirich, P Tummeltshammer, M. Delvai / Poster: Austrochip, Graz; 2007-10-11; in: "Austrochip - Workshop on Microelectronics", (2007), ISBN: 978-3-902465-87-0; 121 - 127
Towards a Systematic Design of Fault-Tolerant Asynchronous Circuits / U. Schmid, A. Steininger, H. Veith / Poster: GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, München; 2007-03-26 - 2007-03-28; in: "Fachtagung Zuverlässigkeit und Entwurf", VDE Verlag, (2007), ISBN: 978-3-8007-3023-0; 173 - 174
Vergleich zweier zwischen Sicherheit und Performanz rekonfigurierbarer Prozessorsysteme / T. Kottke, A. Steininger / Poster: 19. ITG/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Errlangen; 2007-03-11 - 2007-03-13; in: "19. Workshop - Testmethoden und Zuverlässigkeit von Schaltungen und Systemen", (2007)
Clock Synchronization in the Byzantine-Recovery Failure Model / E. Anceaume, C. Delporte-Gallet, H. Fauconnier, M. Hurfin, J. Widder / Talk: International Conference On Principles Of Distributed Systems (OPODIS), Guadeloupe; 2007-12-17 - 2007-12-20; in: "International Conference On Principles Of DIstributed System", (2007), 90 - 104
Hardware Implementation of an SAD based stereo vision algorithm / K. Ambrosch, M. Humenberger, W. Kubinger, A. Steininger / Talk: Third IEEE Workshop on Embedded Computer Vision, Minneapolis; 2007-06-23; in: "Proceedings of Third IEEE Workshop on Embedded Computer Vision", (2007)
Concepts and Tools for the Test of the Communication Sub-System of Time-Triggered Distributed Embedded Systems / M. Horauer, E. Armengaud, A. Steininger / Talk: International Conference on Design Engineering Technical Conferences & Computers and Information in Engineering (ASME), Las Vegas; 2007-09-04 - 2007-09-07; in: "ASME 2007 International Conference on Design Engineering Technical Conferences & Computers and Information in Engineering", (2007)
A Fail-Silent Reconfigurable Superscalar Processor / T. Kottke, A. Steininger / Talk: 13th Pacific Rim International Symposium on Dependable Computing (PRDC 07), Melbourne; 2007-12-17 - 2007-12-19; in: "13th Pacific Rim International Symposium on Dependable Computing (PRDC'07), Melbourne", (2007), 232 - 239
The Effect of Quartz Drift on Convergence-Average based Clock Synchronization / E. Armengaud, A. Steininger, A. Hanzlik / Talk: IEEE International Conference on Emerging Technologies and Factory Automation (ETFA), Patras; 2007-09-25 - 2007-09-28; in: "Proceedings of the 12th IEEE Conference on Emerging Technologies and Factory Automation", (2007), 1123 - 1130
Adopting the Scan Approach for a Fault Tolerant Asynchronous Clock Generation Circuit / T. Handl, A. Steininger, G. Kempf / Talk: International Design and Test Workshop (IDT), Kairo; 2007-12-16 - 2007-12-18; in: "Proceedings IDT'07 - The Second International Design and Test Workshop", (2007), 115 - 119
SAFE - A Scalable Environment for Automated Transistor Level Fault Effect Analysis / J. Grahsl, T. Handl, A. Steininger, G. Kempf / Talk: Austrochip, Graz; 2007-10-11; in: "Austrochip - Workshop on Microelectronics", (2007), 91 - 98
Synchronous Consensus with Mortal Byzantines / J. Widder, G. Gridling, B. Weiss, J. Blanquart / Talk: IEEE Conference on Dependable Systems and Networks (DSN), Edinburgh; 2007-06-25 - 2007-06-28; in: "Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks", (2007)
Relating Stabilizing Timing Assumptions to Stabilizing Failure Detectors Regarding Solvability and Efficiency / M. Biely, M. Hutle, L. Penso, J. Widder / Talk: Ninth International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2007), Paris; 2007-11-14 - 2007-11-16; in: "stabilization", (2007)
Tolerating Corrupted Communication / M. Biely, B. Charron-Bost, A. Gaillard, M. Hutle, A. Schiper, J. Widder / Talk: ACM Symposium on Principles of Distributed Computing, Portland; 2007-08-12 - 2007-08-15; in: "26th ACM Symposium on Principles of Distributed Computing (PODC'07)", (2007), 244 - 253
An Efficient Test Strategy for a Fault-Tolerant Clock Generator for Systems-on-Chip / T. Handl, A. Steininger, G. Kempf / Talk: 19. ITG/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Errlangen; 2007-03-11 - 2007-03-13; in: "19. Workshop - Testmethoden und Zuverlässigkeit von Schaltungen und Systemen", (2007), 66 - 70

2006

A CORBA-Based Architecture for Hard Real-Time Systems / T. Losert, W. Huber, K. Hendling, M. Jandl / in: "Intelligent Systems at the Service of Mankind - Volume II", Ubooks, Augsburg, 2006, ISBN: 3866080522, 239 - 254
Anytime, Everywhere - Approaches to Distance Labs in Embedded Systems Education - Extended Abstract / M. Proske, C. Trödhandl / in: "Proceedings of ICTTA 2006", IEEE, 2006, 205 - 206
Design Variety in Hardware/Software Codesign - Implementations of an AES Encoder / K. Ambrosch, C. Helpa, J. Lechner, R. Leidenfrost, T. Panhofer, A. platschek, S. Ramberger, U. Stadler, D. Steiner, H. Trinkl, C. Widtmann, M. Delvai / in: "Austrochip Mikroelektroniktagung", Austrochip 2006, 2006, 181 - 188
Simulating Distributed Real-Time Systems / D. Albeseder, J. Widder / Poster: Junior Scientist Conference, Wien; 2006-04-19 - 2006-04-21; in: "Junior Scientist Conference 2006", (2006), 83 - 84
Implementation of an FPGA-Based Hardware Fault Injector / T. Handl, A. Steininger / Poster: Junior Scientist Conference, Wien; 2006-04-19 - 2006-04-21; in: "Junior Scientist Conference 2006", (2006), 23 - 24
Efficient Position-based Communication in Wireless Ad-hoc Networks / H. Stratil, U. Schmid / Poster: Junior Scientist Conference, Wien; 2006-04-19 - 2006-04-21; in: "Junior Scientist Conference 2006", (2006), 75 - 76
Solving the Fundamental Problem of Digital Design -- A Systematic Review of Design Methods / M. Delvai, A. Steininger / Poster: 9th Euromicro Conference on Digital System Design, Dubrovnik; 2006-08-30 - 2006-09-01; in: "9th Euromicro Conference on Digital System Design - Architectures, Methods and Tools", (2006), 131 - 136
A Remote and Transparent Approach for the Test and Diagnosis of Automotive Networks / E. Armengaud, A. Steininger / Poster: Junior Scientist Conference, Wien; 2006-04-19 - 2006-04-21; in: "Junior Scientist Conference 2006", (2006)
Low Level Bus Traffic Replay for the Test of Time-Triggered Communication Systems / E. Armengaud / Poster: 9th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS06), Prag; 2006-04-18 - 2006-04-21; in: "9th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems", (2006), 155 - 156
An Efficient Test for a Transition Signalling based Up-/Down-Counter / M Függer, T. Handl, A. Steininger, J. Widder, C. Tögel / Poster: Austrochip, Wien; 2006-10-11; in: "Austrochip Mikroelektroniktagung", (2006), 55 - 62
Embedded Systems Exams With True/False Questions: A Case Study / G. Gridling, B. Weiss, W. Elmenreich, C. Trödhandl / Talk: Second IASTED International Conference on Education and Technology, Calgary; 2006-07-17 - 2006-07-19; in: "Proceedings of the Second International Conference on Education and Technology", (2006), 168 - 172
Embedded Systems Home Experimentation / W. Elmenreich, C. Trödhandl, B. Weiss / Talk: Second IASTED International Conference on Education and Technology, Calgary; 2006-09-17 - 2006-09-19; in: "Proceedings of the Second International Conference on Education and Technology", (2006), 11 - 15
Remote Target Monitoring in Embedded Systems Lab Courses using a Sensor Network / C. Trödhandl, M. Proske, W. Elmenreich / Talk: The 32nd Annual Conference of the IEEE Industrial Society, Paris; 2006-11-06 - 2006-11-10; in: "The 32nd Annual Conference of the IEEE Industrial Society - IECON'2006", (2006), 5433 - 5438
Recovery Mechanisms for Dual Core Architectures / C. El Salloum, A. Steininger, P Tummeltshammer / Talk: IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT ), Washington DC, USA; 2006-10-04 - 2006-10-06; in: "21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2006, Proceedings", (2006), ISBN: 0-7695-2706-x; 380 - 388
Reconciling Distributed Computing Models and Real-Time Systems / H. Moser, B. Thallner / Talk: IEEE Real-Time Systems Symposium, Rio de Janiero; 2006-12-05 - 2006-12-08; in: "Proceedings of the 27th IEEE Real-Time Systems Symposium (RTSS'06)", (2006), 73 - 76
Construction of a Fault-Tolerant Wireless Communication Topology Using Distributed Agreement / H. Moser, B. Thallner / Talk: Workshop on Dependability issues in wireless ad hoc networks and sensor networks (DIWANS), Los Angeles; 2006-09-25; in: "DIWANS '06: Proceedings of the 2006 workshop on Dependability issues in wireless ad hoc networks and sensor networks", (2006), 35 - 43
Construction of a Fault-Tolerant Wireless Communication Topology Using Distributed Agreement / H. Moser, U. Schmid / Talk: Junior Scientist Conference, Wien; 2006-04-19 - 2006-04-21; in: "Junior Scientiest Conferenve 2006", (2006), 47 - 48
Optimal clock synchronization revisited: Upper and lower bounds in real-time systems / H. Moser, U. Schmid / Talk: International Conference On Principles Of Distributed Systems (OPODIS), Bordeaux; 2006-12-12 - 2006-12-14; in: "Principles of Distributed Systems", (2006), 94 - 109
Environments for Remote Teaching in Embedded Systems Courses / C. Trödhandl, B. Weiss, T. Handl, M. Proske / Talk: ERCIM / DECOS Workshop on Dependable Embedded Systems, Cavtat (invited); 2006-09-29; in: "2006 ERCIM / DECOS Workshop on Dependable Embedded Systems", (2006)
Testing the Hardware Implementation of a Distributed Clock Generation Algorithm for SoCs / A. Steininger, T. Handl, G. Fuchs, F. Zangerl / Talk: East-West Design & Test International Workshop (EWDTW'06), Sochi (invited); 2006-09-15 - 2006-09-19; in: "East-West Design & Test International Workshop", (2006), 59 - 64
Brief Announcement: Chasing the Weakest System Model for Implementing Omega and Consensus / M. Hutle, D. Malkhi, U. Schmid, L. Zhou / Talk: 8th International Symposium on Stabilization, Safety, and Security of Distributed Systems, Dallas; 2006-11-17 - 2006-11-19; in: "Stabilization, Safety, and Security of Distributed Systems", (2006)
Distance Labs - Embedded Systems @home / M. Proske, C. Trödhandl, T. Handl / Talk: Edutainment 2006, Zhejiang; 2006-04-14 - 2006-04-18; in: "Journal of Computational Information Systems", (2006), 435 - 444
Time-Multiplexed Multiple Constant Multiplication / P Tummeltshammer, A. Steininger / Talk: Junior Scientist Conference, Wien; 2006-04-19 - 2006-04-21; in: "Junior Scientist Conference 2006", (2006), 77 - 78
Asynchronous Logic Design - from Concepts to Implementation / M. Delvai, A. Steininger / Talk: The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications, Orlando; 2006-07-20 - 2006-07-23; in: "The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications - Volume 1", (2006), 81 - 86
A Practical Comparison of Logic Design Styles / M. Delvai, A. Steininger / Talk: The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications, Orlando; 2006-07-20 - 2006-07-23; in: "The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications - Volume 3", (2006), 61 - 66
Optimal Message-Driven Implementations of Omega with Mute Processes / M. Biely, J. Widder / Talk: 8th International Symposium on Stabilization, Safety, and Security of Distributed Systems, Dallas; 2006-11-17 - 2006-11-19; in: "Stabilization, Safety, and Security of Distributed Systems", (2006), 110 - 121
A µController Lab for Distance Learning / G. Gridling, B. Weiss / Talk: 6th International Workshop on Microelectronics Education, Stockholm; 2006-06-08 - 2006-06-09; in: "EWME 2006 - Proceedings", (2006), 129 - 132
Automatic Parameter Identification in FlexRay Based Automotive Communication Networks / E. Armengaud, A. Steininger / Talk: IEEE International Conference on Emerging Technologies and Factory Automation, Prag; 2006-09-20 - 2006-09-22; in: "11th IEEE International Conference on Emerging Technologies and Factory Automation", (2006), 897 - 904
Pushing the Limits of Remote Online Diagnosis in FlexRay Networks / E. Armengaud, A. Steininger / Talk: IEEE International Workshop on Factory Communication Systems, Torino; 2006-06-27 - 2006-06-30; in: "6th IEEE International Workshop on Factory Communication Systems", (2006)
ExTraCT: A New Approach for the Transparent Test of Time-Triggered Communication Systems / E. Armengaud / Talk: 18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Titisee; 2006-03-12 - 2006-03-14; in: "18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen", (2006)
VLSI Implementation of a Fault-Tolerant Distributed Clock Generation / M. Ferringer, G. Fuchs, A. Steininger, G. Kempf / Talk: International Symp. on Defect and Fault Tolerance in VLSI-Systems, Arlington; 2006-10-04 - 2006-10-06; in: "The 21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems", (2006), 563 - 571
Fault-Tolerant Algorithms on SoCs - A case study / A. Steininger, M Függer, U. Schmid, G. Fuchs / Talk: IEEE International Conference on Dependable Systems and Networks, Philadelphia; 2006-06-25 - 2006-06-28; in: "Supplement Proceedings of the 2006 International Conference on Dependable Systems and Networks (DSN)", (2006), 190 - 191
Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip / M Függer, U. Schmid, G. Fuchs, G. Kempf / Talk: European Dependable Computing Conference, Coimbra; 2006-10-18 - 2006-10-20; in: "EDCC-6", (2006), 87 - 96
Threshold Modules -- Die Schlüsselelemente zur Verteilten Generierung eines Fehlertoleranten Taktes / G. Fuchs, J. Grahsl, U. Schmid, A. Steininger, G. Kempf / Talk: Austrochip, Wien; 2006-10-11; in: "Austrochip Mikroelektroniktagung", (2006), 149 - 156
Analysis of Constraints in a Fault-Tolerant Distributed Clock Generation Scheme / G. Fuchs, M Függer, A. Steininger, F. Zangerl / Talk: 3rd International Workshop on Dependable Embedded Systems, Leeds; 2006-10-01; in: "WDES 2006 3rd Workshop on Dependable Embedded Systems", (2006), 22 - 27
A Reconfigurable Generic Dual-Core Architecture / T. Kottke, A. Steininger / Talk: IEEE International Conference on Dependable Systems and Networks, Philadelphia; 2006-06-25 - 2006-06-28; in: "Proceedings of the 2006 International Conference on Dependable Systems and Networks (DSN)", (2006), 45 - 54
Ein dynamisch rekonfigurierbarer superskalarer Prozessor mit den Modi Sicherheit und Performanz / A. Steininger, T. Kottke / Talk: 18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Titisee; 2006-03-12 - 2006-03-14; in: "18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen", (2006), 36 - 40
Teaching Hardware Software Codesign to Software Engineers / M. Delvai, A. Steininger / Talk: 1st International Workshop on Reconfigurable Computing Education, Karlsruhe; 2006-03-01; in: "International Workshop on Reconfigurable Computing Education", (2006)

2005

Small PC-Network Simulation -- A Comprehensive Performance Case Study / D. Albeseder, M Függer, F. Breitenecker, T. Löscher, S. Tauböck / Simulation News Europe, 44/45 (2005), 26 - 32
Dependable Embedded Systems Research at TU Vienna / H. Kopetz, R. Obermaisser, U. Schmid / Elektrotechnik und Informationstechnik (e&i) (invited), 1 (2005), 1; 33 - 37
On the Possibility of Consensus in Asynchronous Systems with Finite Average Response Times / C. Fetzer, M. Süßkraut, U. Schmid / in: "On the Possibility of Consensus in Asynchronous Systems with Finite Average Response Times", IEEE Computer Society, 2005, 271 - 280
A Structured Approach for the Systematic Test of Embedded Automotive Communication Systems / E. Armengaud, F Rothensteiner, A. Steininger, R. Pallierer, M. Horauer, M Zauner / in: "Proceedings International Test Conference 2005", IEEE Computer Society, 2005, ISBN: 0-7803-9039-3, 21 - 28
A Flexible Hardware Architecture for Fast Access on Large Non-Volatile Memories / E. Armengaud, F Rothensteiner, A. Steininger, M. Horauer / Talk: IEEE International Workshop on Desgin & Diagnostic of Electronic Circuits and Systems, Sopron; 2005-04-13 - 2005-04-16; in: "Proceedings of IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS) 2005", (2005), 113 - 120
Proof-Based System Engineering Using a Virtual System Model / M. Biely, G. Le Lann, U. Schmid / Talk: International Service Availability Symposium, Berlin, Deutschland; 2005-04-25 - 2005-04-26; in: "Service Availability", (2005), 164 - 179
Efficient Stimulus Genereation for Remote Testing of Distributed Systems - The Flexray Example / E. Armengaud, A. Steininger, M. Horauer / Talk: ETFA, Catania, Italy; 2005-09-19 - 2005-09-22; in: "Proceedings of the 10th IEEE Internationla Conference on Emerging Technologies and Factory Automation", IEEE, I (2005), 763 - 770
Implementing Reliable Distributed Real Time Systems with the Theta Model / J.-F. Hermant, J. Widder / Talk: International Conference on Principles of Distributed Systems, Pisa; 2005-12-12 - 2005-12-14; in: "9th International Conference on Principles of Distributed Systems", (2005), 259 - 271
A Method for Bit Level Test and Diagnosis of Communication Services / E. Armengaud, A. Steininger, M. Horauer / Talk: IEEE International Workshop on Desgin & Diagnostic of Electronic Circuits and Systems, Sopron; 2005-04-13 - 2005-04-16; in: "Proceedings of IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS) 2005", (2005), 69 - 74
A System for Automatic Testing of Embedded Software in Undergraduate Study Exercises / V. Legourski, C. Trödhandl, B. Weiss / Talk: Workshop on Embedded Systems Education, Jersey City; 2005-09-22; in: "Proceedings Workshop on Embedded Systems Education (WESE'05)", (2005), 44 - 51
An Efficient Test and Diagnosis Environment for Communication Controllers / E. Armengaud, A. Steininger, M. Horauer / Talk: Austrochip, Wien; 2005-10-06; in: "Austrochip 2005", ???, (2005)
Design of an Asynchronous Microprocessor with Four-State Logic / M. Delvai, G. Fuchs, T. Handl, W. Huber, A. Steininger / Talk: Austrochip, Wien; 2005-10-06; in: "Austrochip 2005", (2005), 105 - 112
Designoptimierung eines Prozessors mit Eigenfehlererkennung / T. Kottke, A. Steininger / Talk: 17. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen;, Inssbruck; 2005-02-27 - 2005-03-01; in: "16. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen;", (2005), 55 - 59
Evaluation of Message Delay Correlation in Distributed Systems / D. Albeseder / Talk: 3rd Workshop on Intelligent Solutions in Embedded Systems (WISES'05), Hamburg, Deutschland; 2005-05-20; in: "Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems", (2005), 139 - 150
Voronoi supported communication in Wireless ad-hoc Networks / H. Stratil / Talk: Second International Symposium on Voronoi Diagrams in Science and Engineering, Seoul, Korea; 2005-10-10 - 2005-10-13; in: "The 2nd International Symposium on Voronoi Diagrams in Science and Engineering", (2005), 105 - 116
Fault Tolerant Topology Control with unreliable Failure Detectors / H. Stratil / Talk: IASTED International Conference on Parallel and Distributed Computing Systems, Phoenix, Arizona; 2005-11-14 - 2005-11-16; in: "Proceedings of the 17th IASTED International Conference on Parallel and Distributed Computing and Systems", (2005), ISBN: 0-88986-525-6; 767 - 772
Distributed Construction of an Underlay in Wireless Networks / H. Stratil / Talk: European Workshop on Wireless Sensor Networks, Istanbul, Türkei; 2005-01-31 - 2005-02-02; in: "Proceedings of the Second European Workshop on Wireless Sensor Networks", (2005), 176 - 187
A Case Study in Efficient Microcontroller Education / B. Weiss, G. Gridling, M. Proske / Talk: Workshop on Embedded Systems Education, Jersey City, New Jersey; 2005-09-22; in: "Proceedings Workshop on Embedded Systems Education WESE 2005", (2005), 36 - 43
Topology Control for Fault-Tolerant Communication in Highly Dynamic Wireless Networks / B. Thallner, H. Moser / Talk: Workshop on Intelligent Solutions in Embedded Systems, Hamburg, Deutschland; 2005-05-20; in: "Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems", (2005), 89 - 100
Brief Announcement: On the Possibility and the Impossibility of Message-Driven Self-Stabilizing Failure Detection / M. Hutle, J. Widder / Talk: ACM Symposium on Principles of Distributed Computing, Las Vegas, Nevada; 2005-07-17 - 2005-07-20; in: "Proceedings of the 24th ACM Symposium on Principles of Distributed Computing", (2005), 208
Failure Detection with Booting in Partially Synchronous Systems / J. Widder, G. Le Lann, U. Schmid / Talk: European Dependable Computing Conference, Budapest, Ungarn; 2005-04-20 - 2005-04-22; in: "Dependable Computing Conference - EDCC5", (2005), 20 - 37
On the Possibility and the Impossibility of Message-Driven Self-Stabilizing Failure Detection / M. Hutle, J. Widder / Talk: Seventh International Symposium on Self Stabilizing Systems (SSS 2005), Barcelona, Spanien; 2005-10-26 - 2005-10-27; in: "Self Stabilizing Systems", (2005), 153 - 170
Self-Stabilizing Failure Detector Algorithms / M. Hutle, J. Widder / Talk: IASTED International Conference on Parallel and Distributed Computing Systems, Innsbruck, Austria; 2005-02-15 - 2005-02-17; in: "IASTED International Conference on Parallel and Distributed Computing and Networks", (2005), ISBN: 0-88986-468-3; 485 - 490
Design and Implementation of an Efficient Stack Machine / M. Schöberl / Talk: International Parallel and Distributed Processing Symposium (IPDPS), Denver, Colorado; 2005-04-04 - 2005-04-08; in: "Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International (IPDPS)", (2005), ISBN: 0-7695-2312-9; 159

2004

An FPGA based SoC Design for Testing Embedded Automotive Communication Systems employing the FlexRay Protocol / M. Horauer, F Rothensteiner, M Zauner, E. Armengaud, A. Steininger, H. Friedl, R. Pallierer / Poster: Austrochip, Wien; 2004; in: "Austrochip 2004", TU-Wien, (2004), 119 - 123
Built-in Fault Injection in Hardware-- The FIDYCO Example / B. Rahbaran, A. Steininger, T. Handl / Talk: IEEE International Workshop on Electronic Design, Test and Applications, Perth, Australia; 2004-01-28 - 2004-01-30; in: "Second IEEE International Workshop on Electronic Design, Test and Applications", B. Rahbaran, A. Steininger (ed.); IEEE Computer Society Press, Delta 2004, Perth Australia (2004), ISBN: 0-7695-2081-2; 327 - 332
A Dual Core Architecture with Error Containment / T. Kottke, A. Steininger / Talk: East-West Design & Test International Workshop(EWDTW´04), Yalta-Alushta, Crimea, Ukraine; 2004-09-23 - 2004-09-26; in: "East-West Design & Test International Workshop", (2004), ISBN: 966-659-088-3; 102 - 108
Multiple Constant Multiplication By Time-Multiplexed Mapping of Addition Chains / P Tummeltshammer, J.C Hoe, M Püschel / Talk: DAC 04, San Diego, California, USA; 2004-06-07 - 2004-06-11; in: "DAC 04", (2004), 826 - 829
A Fail-Silent Memory for Automotive Applications / A. Steininger, T. Kottke / Talk: European Test Symposium, Ajaccio,Corsica,France; 2004-05-23 - 2004-05-26; in: "9th European Test Symposium", (2004), 253 - 258
Real-time Fault Injection with Signal-Flip model by FIDYCO / B. Rahbaran, A. Steininger / Talk: IEEE International Conference on Dependable Systems and Networks, Florence, Italy; 2004-06-28 - 2004-07-01; in: "DSN 2004 Supplement", IEEE Computer Society, Supplemental (2004), 70 - 71
A Monitoring Concept for an Automotive Distributed Network - The FlexRay Example / E. Armengaud, A. Steininger, M. Horauer, R. Pallierer, H. Friedl / Talk: 7th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2004), Stara Lesna, Slovakia; 2004-04-18 - 2004-04-21; in: "Proceedings of the 7th Workshop on Design and Diognostics of Electronic Circuits and Systems", (2004), ISBN: 80-969117-9-1; 173 - 178
Brief Announcement: On the Possibility of Consensus in Asynchronous Systems with Finite Average Response Times / C. Fetzer, U. Schmid / Talk: 23th ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing (PODC), St. John´s , Newfoundland, Canada; 2004-07-25 - 2004-07-28; in: "23th ACM SIGACT-SIGOPS Symposium on PRINCIPLES of DISTRIBUTED commuting (PODC)", (2004), 402
Fault Tolerant Communication Topologies for Wireless Ad Hoc Networks / B. Thallner / Talk: IEEE International Conference on Dependable Systems and Networks, Florence, Italy; 2004-06-28 - 2004-07-01; in: "Proceedings 1st Workshop on Dependability Issues in Wireless Ad Hoc Networks and Sensor Networks (DIWANS'04)", (2004), 261 - 266
Design Trade-offs for Systematic Tests of Embedded Communication Systems / E. Armengaud, A. Steininger, M. Horauer, R. Pallierer / Talk: IEEE International Conference on Dependable Systems and Networks, Florence, Italy; 2004-07-28 - 2004-08-01; in: "International Conference on Dependable Systems and Networks (DSN 2004)", (2004), 118 - 119
An efficient implementation of the greedy forwarding strategy / H. Stratil / Talk: 34. Jahrestagung der Gesellschaft für Informatik (GI), Ulm; 2004-09-20 - 2004-09-24; in: "GI-Edition Informatik 2004- Informatik verbindet", Köllen Druck+Verlag, Band 2, Ulm (2004), ISSN: 1617-5468; 365 - 369
Concurrent Checking eines Adressdecoders / A. Steininger, T. Kottke / Talk: 16. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Dresden, Germany; 2004-02-29 - 2004-03-02; in: "GMM/ITG Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen", (2004), 25 - 29
A Generic Dual-Core Architecture / T. Kottke, A. Steininger / Talk: 7th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2004), Stara Lesna, Slovakia; 2004-04-18 - 2004-04-21; in: "7th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2004)", (2004), ISBN: 80-969117-9-1; 159 - 166
A Layer Model for the Systematic Test of Time-Triggered Automotive Communication Systems / E. Armengaud, A. Steininger, M. Horauer, R. Pallierer / Talk: IEEE International Workshop on Factory Communication Systems, Vienna,Austria; 2004-09-22 - 2004-09-24; in: "IEEE Workshop on Factory Communication Systems (WFCS 04)", IEEE Catalog Number 04TH8777 (2004), ISBN: 0-7803-8734-1; 275 - 283
On omega in sparse networks (Fast Abstract) / M. Hutle / Talk: 20th IEEE International Conference on Software Maintenance (ICSM'04), Papeete,Tahiti,French Polynesia; 2004-03-03 - 2004-03-05; in: "Proceedings of the 10th IEEE International Symposium Pacific Rim Dependable Computing ", LAAS-CNRS, (2004), 37 - 38
An efficient failure detector for sparsely connected networks / M. Hutle / Talk: 22nd IASTED International Multi-Conference on Applied Informatics, Innsbruck, Austria; 2004-02-17 - 2004-02-19; in: "Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks ", Acta Press, (2004), ISSN: 1027-2666; 369 - 374
Interference Minimizing Bandwidth Guaranteed On-Line Routing Algorithm for Traffic Engineering / K. Hendling, T. Losert, W. Huber, M. Jandl / Talk: IEEE International Conference on Networks (2004, 12th ICON), Singapur; 2004-11-16 - 2004-11-19; in: "Proceedings of the IEEE International Conference on Networks (2004, 12th ICON) ", IEEE, Volume 2 (2004), ISBN: 0-7803-8783-x; 497 - 503
Revision and Verification of an Enhanced UART / R. Gallo, M. Delvai, W. Elmenreich, A. Steininger / Talk: IEEE International Workshop on Factory Communication Systems, Vienna, Austria; 2004-09-22 - 2004-09-24; in: "Proceedings of the 2004 IEEE International Workshop on Factory Communication Systems", IEEE, (2004), ISBN: 0-7803-8734-1; 315 - 318
Towards a Rapid Prototyping Framework for Architecture Exploration in Embedded Systems / M. Jankela, W. Puffitsch, W. Huber / Talk: Workshop on Intelligent Solutions in Embedded Systems, Graz, Austria; 2004-06-25; in: "Proceedings of the Second Workshop on Intelligent Solutions im Embedded Systems", (2004), ISBN: 3902463007; 117 - 127
An Extensible Transport Framework for CORBA with Emphasis on Real-Time Capabilities / T. Losert, W. Huber, K. Hendling, M. Jandl / Talk: Second IEEE International Conference on Computational Cybernetics 2004 (ICCC'04), Vienna, Austria; 2004-08-30 - 2004-09-01; in: "Proceeding of ICCC'04", (2004), ISBN: 3-902463-01-5; 155 - 161
Embedded Real-Time-Tracer --An Approach with IDE / B. Rahbaran, M Függer, A. Steininger / Talk: Workshop on Intelligent Solutions in Embedded Systems, Austria, Graz; 2004-06-25; in: "Proceedings of the Second Workshop on Intelligent Solutions in Embedded Systems", (2004), ISBN: 3-902463-00-7; 25 - 35

2003

A Generic Architecture for Integrated Smart Transducers / M. Delvai, U. Eisenmann, W. Elmenreich / Talk: International Conference, FPL 2003, Lissabon, Portugal; 2003-09-01 - 2003-09-03
A Generic Architecture for Integrated Smart Transducers / M. Delvai, U. Eisenmann, W. Elmenreich / Lecture Notes in Computer Science, 2778 (2003), 733 - 744
A Transparent Online Memory Test for Simultaneous Detection of Functional Faults and Soft Errors in Memories / K. Thaller, A. Steininger / IEEE Transactions on Reliability, 52 (2003), 4; 413 - 422
Dealing With Dormant Faults in an Embedded Fault-Tolerant Computer System / C. Scherrer, A. Steininger / IEEE Transactions on Reliability, 52 (2003), 4; 512 - 522
Interval-based clock synchronization with optimal precision. / U. Schmid, K. Schossmaier / Information and Computation, 186 (2003), 1; 36 - 77
Intelligent UART Module for Real-Time Applications / M. Delvai, U. Eisenmann, W. Elmenreich / Talk: Workshop on Intelligent Solutions in Embedded Systems (WISES'03), Wien; 2003-06-27; in: "Proceedings of the First Workshop on Intelligent Solutions in Embedded Systems", (2003), 177 - 185
PSynUTC --- evaluation of a high precision time synchronization prototype system for Ethernet LANs. / M. Horauer, U. Schmid, K. Schossmaier, R. Höller, N. Kerö / Talk: IEEE Precise Time and Time Interval Systems and Application Meeting, Reston, Virginia, USA; 2002-12-03 - 2002-12-05; in: "Proceedings of the 34th IEEE Precise Time and Time Interval Systems and Application Meeting (PTTI'02)", (2003), 263 - 278
Processor Support for Temporal Predictability - The SPEAR Design Example / M. Delvai, W. Huber, P. Puschner, A. Steininger / Talk: 15th Euromicro Conference on Real-Time Systems, Porto, Portugal; 2003-07-02 - 2003-07-04; in: "Proceedings of the 15 Euromicro International Conference on Real-Time Systems", (2003), 169 - 176
An optimal Byzantine agreement algorithm with arbitrary node and link failures. / M. Biely / Talk: IASTED International Conference on Parallel and Distributed Computing Systems, Marina Del Rey, California, USA; 2003-11-03 - 2003-11-05; in: "Proc. 15th Annual IASTED International Conference on Parallel", (2003), 146 - 151
Booting clock synchronization in partially synchronous systems. / J. Widder / Talk: International Conference on Distributed Computing Systems, Sorrento, Italy; 2003-10-01 - 2003-10-03; in: "Proceedings of the 17th International Symposium on Distributed Computing ", (2003), 121 - 135
Randomized asynchronous consensus with imperfect communications. / U. Schmid, C. Fetzer / Talk: IEEE Symposium on Reliable Distributed Systems, Florence, Italy; 2003-10-06 - 2003-10-08; in: "Proc. 22nd Symposium on Reliable Distributed Systems ", (2003), 361 - 370

2002

Identifying Efficient Combinations of Error Detection Mechanisms Based on Results of Fault-Injection Experiments / A. Steininger, C. Scherrer / IEEE Transactions on Computers, 51 (2002), 2; 235 - 239
Modular Construction System for Embedded Real-Time Applications / M. Delvai, U. Eisenmann, W. Huber / Poster: Austrochip, Wien; 2002-10-04; in: "Austrochip 2002", (2002), 103 - 109
Time-Triggered Communication with UARTs / W. Elmenreich, M. Delvai / Talk: IEEE International Workshop on Factory Communication Systems, Västeraas; 2002-08-28 - 2002-08-30; in: "Proceedings of the 4th IEEE International Workshop on Factory Communication Systems", (2002), 97 - 104
Connecting EIB to Linux and Java / W. Kastner, B. Thallner / Talk: 6th IEEE Africon Conference, George, South Africa; 2002-10-04; in: "Proceedings of the IEEE 6th AFRICON Conference", (2002), ISBN: 0-7803-7570-x; 273 - 276
Simulation of a Wireless CDMA ad hoc network / G. Gridling, B. Thallner / Talk: IASTED Int. Conf. Communictions and Computer Networks, Cambridge, USA; 2002-11-04 - 2002-11-06; in: "Proceedings of the IASTED Internatonal Conference on Communications and Computer Networks", (2002), ISBN: 0-88986-329-6; 354 - 359
Using Offline and Online BIST to Improve System Dependability - The TTPC-C Example / A. Steininger, J. Vilanek / Talk: IEEE INTERNATIONAL CONFERENCE ON COMPUTER Design: VLSI in Computers & Processors, Freiburg, Germany; 2002-09-16 - 2002-09-18; in: "Computer Design: VLSI in Computers & Processors", (2002), 277 - 280
FPGA Implementation of the Time-Triggered Protocol Controller TTPC-C Verification, Design-Experiences and Benefits / J. Vilanek, A. Steininger / Talk: World Multiconference on Systemics, cybernetics and Informatics, Orlando, Florida, USA; 2002-07-14 - 2002-07-18; in: "PROCEEDINGS", (2002), 407 - 412

2001

FPGA prototyping of a RISC processor core for embedded applications / D. Maurer, V. Salapura, M. Gschwind / IEEE Transactions on Computers, 9 (2001), 241 - 250
A General Public License Linux Device Driver for the EIB / W. Kastner, B. Thallner / Talk: EIB Scientific Conference and Technology Workshop, Munich, Germany; 2001-10-04 - 2001-10-05; in: "EIB-Proceedings V", (2001)
A highly-efficient transparent online memory test / K. Thaller / Talk: Test Conference, Baltimore, MD, USA; 2001-10-30 - 2001-11-01; in: "Proceedings", (2001), 230 - 239
How To Tune the MTTF of a Fault-Tolerant System / A. Steininger, C. Scherrer / Talk: International Symp. on Defect and Fault Tolerance in VLSI-Systems, San Francisco, California, USA; 2001-10-02 - 2001-10-06; in: "PROCEEDINGS", (2001), 251 - 256

2000

Vom Lenkrad zum Joystick / A. Steininger, C. Scherrer / Elektrotechnik und Informationstechnik (e&i), 11 (2000), 714 - 720
Testing and Built-in-Self-Test - A Survey / A. Steininger / Journal of Systems Architecture, 46 (2000), 721 - 747
Periodic Node Shutdown in a Fail-Silent Architecture - Risk or Rescue? / C. Scherrer, A. Steininger / Poster: World Multiconference on Systemics, cybernetics and Informatics, Orlando, Florida, USA; 2000-07-14 - 2000-07-18; in: "PROCEEDINGS", (2000), 205 - 210
How does Resource Utilization Affect Fault Tolerance? / C. Scherrer, A. Steininger / Talk: International Symp. on Defect and Fault Tolerance in VLSI-Systems, Mt. Fuji, Yamanashi, Japan; 2000-10-02 - 2000-10-06; in: "PROCEEDINGS", (2000), 418 - 425

Theses

2018

Agreement Algorithms in Directed Dynamic Networks / PhD Thesis by M. Schwarz / Supervisor, Reviewer: U. Schmid, E. Godard; Institut für Computer Engineering, 2018; oral examination: 2018-06-15
People tracking using particle filters and an advanced human motion model on mobile robots / Master Thesis by F. Beck / Supervisor: J. Blieberger, M. Bader; Institute of Computer Engineering, 2018; final examination: 2018-04-11
Temporal-Epistemic Logic in Byzantine Message-Passing Contexts / Master Thesis by P. Fimml / Supervisor: U. Schmid; Institut für Computer Engineering, 2018; final examination: 2018-01-08
Knowledge and Communication Complexity in Distributed Systems / Master Thesis by D. Pfleger / Supervisor: U. Schmid; Institut für Computer Engineering, 2018; final examination: 2018-04-11

2017

Design of Custom ASIC for Radiation Experiments to Study Single Event Effects / PhD Thesis by V. S. Veeravalli / Supervisor, Reviewer: C. Metra, M. Krstic; Technische Informatik, 2017; oral examination: 2017-11-24
Protecting 4-Phase Delay-Insensitive Communication Against Transient Faults / Master Thesis by F. Huemer / Supervisor: A. Steininger; Technische Informatik, 2017; final examination: 2017-02-20

2016

ASCARTS Design of an Asynchronous Processor using a High-Level Specification Language / Master Thesis by C. Hermann / Supervisor: A. Steininger, J. Lechner; Institut für Technische Informatik, 2016

2015

Selection and Hardware-Implementation of an Efficient Consensus Algorithm for a Mesochronous System / Master Thesis by A. Heinisch / Supervisor: T. Polzer, A. Steininger; Technische Informatik, 2015; final examination: 2015-01-15

2014

Real-Time Performance Analysis of Synchronous Distributed Systems / PhD Thesis by A. Kößler / Supervisor, Reviewer: U. Schmid, K. Chatterjee; Institut für Technische Informatik (E182/2), 2014; oral examination: 2014-11-27
Composability for Fail-Safe Safety-Critical Systems / PhD Thesis by S. Resch / Supervisor, Reviewer: A. Steininger, W. Elmenreich; Technische Informatik, 2014; oral examination: 2015-01-26
Building Robust GALS Circuits: Fault-Tolerant and Variation-Aware Design Techniques for Reliable Circuit Operation / PhD Thesis by J. Lechner / Supervisor, Reviewer: A. Steininger, J. Sparso; Institut für Technische Informatik, 2014; oral examination: 2014-06-17
Efficient Interfacing Between Timing Domains / Master Thesis by R. Kutschera / Supervisor: A. Steininger; Technische Informatik, 2014
Effekte von Stuck-At Faults in Delay-Insensitiver Logik / Master Thesis by C. Trenkwalder / Supervisor: A. Steininger; Technische Informatik, 2014
Online Test Vector Insertion - A Concurrent Built-In Self-Testing (CBIST) Approach for Asynchronous Logic / Master Thesis by J. Maier / Supervisor: A. Steininger; Technische Informatik, 2014

2013

A Non-Blocking Fault-Tolerant Asynchronous Networks-on-Chip Router / PhD Thesis by S. Naqvi / Supervisor, Reviewer: A. Steininger, E. Grass, M. Schöberl; Institut für Technische Informatik, 2013
A Digital Metastability Model for VLSI Circuits / PhD Thesis by T. Polzer / Supervisor, Reviewer: A. Steininger, A. Yakovlev; Institut für Technische Informatik, 2013
Analysis of Embedded Real-Time Systems at Runtime / PhD Thesis by T. Reinbacher / Supervisor, Reviewer: A. Steininger, J. Schumann, S. Kowalewski; Institut für Technische Informatik, 2013
Performance Aware Hardware Runtime Monitors / Master Thesis by A. Hagmann / Supervisor: A. Steininger; Institut für Technische Informatik, 2013
Design and Evaluation of an AXI4 Bus System / Master Thesis by K. Pados / Supervisor: A. Steininger; Institut für technische Informatik, 2013
Analysis of the Failure Behavior of Memory Management Units / Master Thesis by O. Hechinger / Supervisor: A. Steininger; Institut für technische Informatik, 2013
Solving the Labeling Problem - A Byzantine Fault-Tolerant Self-Stabilizing FPGA Prototype based on the FATAL<sup>+</sup> Protocol / Master Thesis by M. Hofstätter / Supervisor: U. Schmid, M Függer; Institut für technische Informatik, 2013; final examination: 2013-10-08
Easy Impossibility Proofs for k-Set Agreement / Master Thesis by K. Winkler / Supervisor: U. Schmid; Institut für technische Informatik, 2013; final examination: 2013-11-22
Self-Stabilizing Byzantine Fault-Tolerant Clock Distribution in Grids / Master Thesis by M. Perner / Supervisor: U. Schmid; Institut für technische Informatik, 2013; final examination: 2013-10-08
Solving k-Set Agreement in Dynamic Networks / Master Thesis by M. Schwarz / Supervisor: U. Schmid; Institut für technische Informatik, 2013; final examination: 2013-10-08

2012

Effects and Mitigation of Transient Faults in Quasi Delay-Insensitive Logic / PhD Thesis by W. Friesenbichler / Supervisor, Reviewer: A. Steininger, H. Vierhaus; Institut für Technische Informatik, 2012
Self-Healing Asynchronous Circuits for High-Reliability Applications / PhD Thesis by T. Panhofer / Supervisor, Reviewer: A. Steininger, H. Vierhaus; Institut für Technische Informatik, 2012
Asynchronous Logic in Real-Time Systems / PhD Thesis by M. Ferringer / Supervisor, Reviewer: A. Steininger, G. Fohler; Institut für Technische Informatik, 2012
Elaboration of a Fault-Tolerant Strategy for Space-born Digital Signal Processing Applications / Master Thesis by B. Fuchs / Supervisor: A. Steininger; Technische Informatik, 2012

2011

Weak System Models for Fault-Tolerant Distributed Agreement Problems / PhD Thesis by P. Robinson / Supervisor, Reviewer: U. Schmid, M. Raynal; Institut für Technische Informatik (E182/2), 2011; oral examination: 2011-01-31

2010

Analysis of On-Chip Fault-Tolerant Distributed Algorithms / PhD Thesis by M Függer / Supervisor, Reviewer: U. Schmid, L. Welch; Institut für Technische Informatik - 182/2, 2010
Efficient Interference Reduction in Low Complex Digital Direct Sequence Spread Spectrum Systems / PhD Thesis by S. Khattab / Supervisor, Reviewer: A. Goiser, U. Schmid; E389, 2010; oral examination: 2010-06-02
Topology in Distributed Computing / Master Thesis by T. Nowak / Supervisor: U. Schmid; Institut für Technische Informatik - 182/2, 2010
A Pipelined Distributed Fault-Tolerant Clock Generation Algorithm in VLSI - Proofs and Implementation / Master Thesis by A. Dielacher / Supervisor: U. Schmid, M Függer; Institut für Technische Informatik - 182/2, 2010

2009

Mapping Stereo Matching Algorithms to Hardware / PhD Thesis by K. Ambrosch / Supervisor, Reviewer: A. Steininger, R. Siegwart; Institut für Technische Informatik, 2009
Dynamic Aspects of Modelling Distributed Computations / PhD Thesis by M. Biely / Supervisor, Reviewer: U. Schmid, B. Charron-Bost; Institut für Technische Informatik, 2009; oral examination: 2009-11-30
Analysis of Common Cause Faults in Dual Core Architectures / PhD Thesis by P Tummeltshammer / Supervisor, Reviewer: A. Steininger, Z. Kotasek; Institut für Technische Informatik, 2009; oral examination: 2009-10-20
Fault-Tolerant Distributed Algorithms for On-Chip Tick Generation: Concepts, Implementations and Evaluations / PhD Thesis by G. Fuchs / Supervisor, Reviewer: A. Steininger, C. Metra; Institut für Technische Informatik, 2009; oral examination: 2009-10-20
A Model for Distributed Computing in Real-Time Systems / PhD Thesis by H. Moser / Supervisor, Reviewer: U. Schmid, L. Welch; Institut für Technische Informatik, 2009; oral examination: 2009-05-20
Automated Regression Testing of Embedded Devices / Master Thesis by P. Jahn / Supervisor: A. Steininger, A. Reisenbauer; Institut für Technische Informatik, 2009
Fault-Tolerant Hardware Implementation of a Consensus Algorithm / Master Thesis by T. Polzer / Supervisor: A. Steininger, T. Handl; Institut für Technische Informatik, 2009

2008

Concepts for Virtual Prototyping of Distributed Embedded Systems / PhD Thesis by H. Muhr / Supervisor, Reviewer: D. Dietrich, A. Steininger; Institut für Computertechnik, 2008; oral examination: 2008-12-22
A Transparent Online Test Approach for Time-Triggered Communication Protocols / PhD Thesis by E. Armengaud / Supervisor, Reviewer: A. Steininger, F. Simonot-Lion; Institut für technische Informatik, 2008
FSL Tool / Master Thesis by J. Lechner / Supervisor: M. Delvai; Institut f. Technische Informatik, Embedded Computing Systems Group, 2008
Asynchronous EUART / Master Thesis by W. Klein / Supervisor: M. Delvai; Institut f. technische Informatik, Embedded Computing Systems Group, 2008
AMBA4SPEAR2: An AMBA Extension Module for the SPEAR2 Processor Core / Master Thesis by J. Mosser / Supervisor: M. Delvai; Institut f. Technische Informatik, Embedded Computing Systems Group, 2008
SPEAR2 - An Improved Version of SPEAR / Master Thesis by M. Fletzer / Supervisor: M. Delvai; Institut f. Technische Informatik, Embedded Computing Systems Group, 2008
Optimization of FSL Gates / Master Thesis by M. Jeitler / Supervisor: M. Delvai; Institut für Technische Informatik, 2008

2006

An Asynchronous Hardware Design for Distributed Tick Generation / Master Thesis by M. Ferringer / Supervisor: A. Steininger; Technische Informatik, E182/2, 2006; final examination: 2006
Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip / Master Thesis by M Függer / Supervisor: U. Schmid; Technische Informatik, E182/2, 2006; final examination: 2006

2005

Untersuchung von fehlertoleranten Prozessorarchitekturen für sicherheitsrelevante Automobilanwendungen / PhD Thesis by T. Kottke / Supervisor, Reviewer: A. Steininger, H. Wunderlich; Institut für Technische Informatik, 2005
Advantages and Limitations of Position-based Communication in Wireless Ad-hoc Networks / PhD Thesis by H. Stratil / Supervisor, Reviewer: U. Schmid; Technische Informatik, E182/2, 2005; oral examination: 2005
Failure Detection in Sparse Networks / PhD Thesis by M. Hutle / Supervisor, Reviewer: U. Schmid; Technische Informatik, E182/2, 2005; oral examination: 2005
An Experimental Comparison of Robustness between Synchronous and Asynchronous Logic Design / PhD Thesis by B. Rahbaran / Supervisor, Reviewer: A. Steininger; Technische Informatik, E182/2, 2005; oral examination: 2005
Design of an Asynchronous Processor Based on Code Alternation Logic - Exploration of Delay Insensitivity / PhD Thesis by W. Huber / Supervisor, Reviewer: A. Steininger; Technische Informatik, E182/2, 2005; oral examination: 2005
JOP: A Java Optimized Processor for Embedded Real-Time Systems / PhD Thesis by M. Schöberl / Supervisor, Reviewer: A. Steininger, P. Puschner; Technische Informatik, E182, 2005; oral examination: 2005
Design of an Asynchronous Processor Based on Code Alternation Logic - Treatment of Non-Linear Data Paths / PhD Thesis by M. Delvai / Supervisor, Reviewer: A. Steininger, R. Eier; Institut für Technische Informatik / Embedded Computing Systems, 2005
Revision and Verification of an Enhanced UART / Master Thesis by R. Gallo / Supervisor: M. Delvai, A. Steininger; Technische Informatik, E182/2, 2005; final examination: 2005
Distributed Construction of a Fault-Tolerant Wireless Communication Topology for Networked Embedded Systems / Master Thesis by H. Moser / Supervisor: U. Schmid; Institut für Technische Informatik / Embedded Computing Systems, 2005

2004

Clock Synchronization in Distributed Systems / PhD Thesis by M. Horauer / Supervisor, Reviewer: R. Eier, U. Schmid; Institut für Computertechnik, 2004
Distributed Computing in the Presence of Bounded Asynchrony / PhD Thesis by J. Widder / Supervisor, Reviewer: U. Schmid, M. Jazayeri; Institut für Technische Informatik / Embedded Computing Systems, 2004
A Superscalar 16 Bit Microcontroller for Real-Time Applications / Master Thesis by G. Fuchs / Supervisor: A. Steininger, M. Delvai; Institut für Technische Informatik / Embedded Computing Systems, 2004
Multiple Constant Multiplication by Time-Multiplexed Mapping of Addition Chains / Master Thesis by P Tummeltshammer / Supervisor: A. Steininger; Institut für Technische Informatik / Embedded Computing Systems, 2004
Implementierung eines FPGA-basierten Hardware-Fehlerinjektors / Master Thesis by T. Handl / Supervisor: A. Steininger; Institut für Technische Informatik / Embedded Computing Systems, 2004
Experimentelle Verifikation von Synchronitätsannahmen für Computernetzwerke / Master Thesis by D. Albeseder / Supervisor: U. Schmid; Institut für Technische Informatik / Embedded Computing Systems, 2004

2003

Realisierung eines generischen Online Debuggers für Embedded Systems / Master Thesis by C. El Salloum / Supervisor: M. Delvai, A. Steininger; Institut für Technische Informatik, 2003
Asynchrone Realisierung einer Arithmetic Logic Unit / Master Thesis by T. Pedram / Supervisor: M. Delvai, A. Steininger; Institut für Technische Informatik, 2003
Entwicklung eines USB fullspeed VHDL-Cores / Master Thesis by M. Eggenhofer / Supervisor: J. Vilanek, A. Steininger; Institut für Technische Informatik, 2003

2002

Zuverlässigkeit zweifach redundanter Architekturen unter besonderer Berücksichtigung latenter Fehler / PhD Thesis by C. Scherrer / Supervisor, Reviewer: A. Steininger, R. Patzelt; Institut für Technische Informatik, 2002
Design and implementation of a highly efficient communication node for real-time applications / Master Thesis by U. Eisenmann / Supervisor: A. Steininger, M. Delvai; Institut für Technische Informatik, 2002
Realization of a Re-Usable Offline Debugger for the SPEAR Micro-Controller / Master Thesis by M. Jankela / Supervisor: A. Steininger, M. Delvai; Institut für Technische Informatik, 2002
Topology Management and Routing in Wireless Networks - An Overview / Master Thesis by H. Stratil / Supervisor: U. Schmid; 183, 2002
Byzantine agreement under the perception-based fault model / Master Thesis by M. Biely / Supervisor: U. Schmid; 183, 2002
Constraint Satisfaction Problems - Hyprid Decompostion and Evaluation / Master Thesis by M. Hutle / Supervisor: F. Wotawa; Institut für Informationssysteme, 2002
Data Path for a FlrxRay-to-FlexRay Gateway / Master Thesis by E. Armengaud / Supervisor: A. Steininger; Institut für Technische Informatik, 2002
Communication protocol test device in VHDL / Master Thesis by C. Resanka / Supervisor: A. Steininger; Institut für Technische Informatik, 2002

2001

Zur Rolle der Verifikation im Designprozess digitaler integrierter Schaltungen / PhD Thesis by J. Vilanek / Supervisor, Reviewer: A. Steininger, R. Eier; Institut für Technische Informatik, 2001
A Transparent Online Memory Test / PhD Thesis by K. Thaller / Supervisor, Reviewer: A. Steininger, R. Eier; Institut für Technische Informatik, 2001
Ein Linuxtreiber für den Europäischen Installationsbus EIB / Master Thesis by B. Thallner / Supervisor: W. Kastner, G. Schildt; Institut für Rechnergestützte Automation, 2001

2000

Entwicklung eines Mikrokontrollers für das Echtzeitprotokoll TTP/A / Master Thesis by M. Delvai / Supervisor: A. Steininger, W. Elmenreich; Institut für Technische Informatik, 2000
Simulation einer SCSI-Festplatte unter LINUX / Master Thesis by W. Huber / Supervisor: A. Steininger; Institut für Technische Informatik, 2000
Entwicklung eines Mikroprozessorsmit Built-in Self-Test / Master Thesis by T. Hinterstoisser / Supervisor: A. Steininger; Institut für Technische Informatik, 2000
Experimentelle Verifikation eines Transparent Online Memory Test / Master Thesis by R. Steinwendtner / Supervisor: A. Steininger; Institut für Technische Informatik, 2000

1997

Synthese eines SAB-R3223 in VHDL und State Charts / Master Thesis by J. Vilanek / "Synthese eines SAB-R3223 in VHDL und State Charts"; Institut für Technische Informatik, 1997

Awards

Josef Widder: FIT-IT Embedded Systems Dissertationsstipendium "Distributed Computing in the Presence of Bounded Asynchrony" / Austria / 2004
Ulrich Schmid: Synchronized Universal Time Coordinated for Distributed Real-Time Systems / START-Programm / Austria / 1997
Ulrich Schmid: Kardinal Innitzer Förderungspreis / Kardinal-Innitzer-Preis / Austria / 1995

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