TU Wien Informatics

About

The scope of our research and teaching activities at the Embedded Computing Systems unit ranges from dependable and power-efficient digital circuits to future generation computer architectures to networked embedded systems and fault-tolerant distributed systems in general.

Nonwithstanding a clear focus on scientific research, the spectrum of our work ranges from formal-mathematical analysis to simulation-based experimental evaluation to prototype implementations. With respect to teaching, the ECS group is primarily responsible for related courses in the Bachelor’s and Master’s programs Technische Informatik (Computer Engineering).

The research Unit Embedded Computing Systems is part of the Institute of Computer Engineering.

Ulrich Schmid
Ulrich Schmid U. Schmid

Head of Research Unit
Univ.Prof. DI Dr.

Andreas Steininger
Andreas Steininger A. Steininger

Associate Professor
Ao.Univ.Prof. DI Dr.

Giorgio Cignarale
Giorgio Cignarale G. Cignarale

PreDoc Researcher
Mag.

Alessio Colucci
Alessio Colucci A. Colucci

PreDoc Researcher
Mag. / BSc

Stephan Felber
Stephan Felber S. Felber

PreDoc Researcher
DI / BSc

Krisztina Fruzsa
Krisztina Fruzsa K. Fruzsa

PreDoc Researcher
MA

Florian Ferdinand Huemer
Florian Ferdinand Huemer F. Huemer

PostDoc Researcher
DI Dr. / BSc

Florian Kriebel
Florian Kriebel F. Kriebel

PreDoc Researcher
Dipl.-Inf.

Roman Kuznets
Roman Kuznets R. Kuznets

PostDoc Researcher
MPhil PhD

Alberto Marchisio
Alberto Marchisio A. Marchisio

PreDoc Researcher
Mag. / BSc

Thomas Schlögl
Thomas Schlögl T. Schlögl

PreDoc Researcher
DI / BSc

Manfred Siegl
Manfred Siegl M. Siegl

Lecturer
DI Dr.

2022W

2023S

 

Note: Due to the rollout of TU Wien’s new publication database, the list below may be slightly outdated. Once the migration is complete, everything will be up to date again.

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

  • Supply Voltage Dependent On-Chip Single-Event Transient Pulse Shape Measurements in 90-nm Bulk CMOS Under Alpha Irradiation / Hofbauer, M., Schweiger, K., Zimmermann, H., Giesen, U., Langner, F., Schmid, U., & Steininger, A. (2013). Supply Voltage Dependent On-Chip Single-Event Transient Pulse Shape Measurements in 90-nm Bulk CMOS Under Alpha Irradiation. IEEE Transactions on Nuclear Science, 60(4), 2640–2646. http://hdl.handle.net/20.500.12708/156043
  • An infrastructure for accurate characterization of single-event transients in digital circuits / Veeravalli, V. S., Polzer, T., Schmid, U., Steininger, A., Hofbauer, M., Schweiger, K., Dietrich, H., Schneider-Hornstein, K., Zimmermann, H., Voss, K.-O., Merk, B., & Hajek, M. (2013). An infrastructure for accurate characterization of single-event transients in digital circuits. Microprocessors and Microsystems, 37, 772–791. http://hdl.handle.net/20.500.12708/156041
  • On the performance of a retransmission-based synchronizer / Nowak, T., Függer, M., & Kößler, A. (2013). On the performance of a retransmission-based synchronizer. Theoretical Computer Science, 509, 25–39. https://doi.org/10.1016/j.tcs.2012.04.035
  • Runtime verification of embedded real-time systems / Reinbacher, T., Függer, M., & Brauer, J. (2013). Runtime verification of embedded real-time systems. Formal Methods in System Design, 44(3), 203–239. https://doi.org/10.1007/s10703-013-0199-z / Project: CEVTES
  • The Effect of Forgetting on the Performance of a Synchronizer / Zeiner, M., Függer, M., Schmid, U., Kößler, A., & Nowak, T. (2013). The Effect of Forgetting on the Performance of a Synchronizer. 18th ÖMG Congress and Annual DMV Meeting, Universität Innsbruck, Austria. http://hdl.handle.net/20.500.12708/85720
  • FATAL+HEX: Fault-Tolerant Self-Stabilizing Clock Generation+Distribution / Dolev, D., Függer, M., Hofstätter, M., Lenzen, C., Perner, M., Posch, M., Schmid, U., Sigl, M., & Steininger, A. (2013). FATAL+HEX: Fault-Tolerant Self-Stabilizing Clock Generation+Distribution. Poster Session at the CSAIL Industry Affiliates Program (CSAIL-IAP) Annual Meeting, Cambridge, MA, USA, Non-EU. http://hdl.handle.net/20.500.12708/85710
  • Single Event Transient Pulse Shape Measurements by On-chip Sense Amplifiers in a Single Inverter for Intermediate Input States under Alpha Particle Irradiation / Hofbauer, M., Schweiger, K., Gaberl, W., Zimmermann, H., Giesen, U., Langner, F., Schmid, U., & Steininger, A. (2013). Single Event Transient Pulse Shape Measurements by On-chip Sense Amplifiers in a Single Inverter for Intermediate Input States under Alpha Particle Irradiation. IEEE Nuclear and Space Radiation Effects Conference (NSREC), San Francisco, California (USA), Non-EU. http://hdl.handle.net/20.500.12708/85741
  • Automated Analysis of Real-Time Scheduling using Graph Games / Chatterjee, K., Kößler, A., & Schmid, U. (2013). Automated Analysis of Real-Time Scheduling using Graph Games. In Proceedings 16th ACM International Conference on Hybrid Systems: Computation and Control (HSCC’13) (pp. 163–172). ACM. http://hdl.handle.net/20.500.12708/55031
  • Digital Late-Transition Metastability Simulation Model / Polzer, T., & Steininger, A. (2013). Digital Late-Transition Metastability Simulation Model. In Proceedings of the 16th Euromicro Conference on Digital System Design (p. 8). http://hdl.handle.net/20.500.12708/55024
  • Metastability Characterization for Muller C-Elements / Polzer, T., & Steininger, A. (2013). Metastability Characterization for Muller C-Elements. In 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013) (p. 8). http://hdl.handle.net/20.500.12708/55023
  • An Approach for Efficient Metastability Characterization of FPGAs through the Designer / Polzer, T., & Steininger, A. (2013). An Approach for Efficient Metastability Characterization of FPGAs through the Designer. In 19th IEEE International Symposium on Asynchronous Circuits and Systems (p. 9). http://hdl.handle.net/20.500.12708/55021
  • A Multi-Credit Flow Control Scheme for Asynchronous NoCs / Naqvi, S. R., Najvirt, R., & Steininger, A. (2013). A Multi-Credit Flow Control Scheme for Asynchronous NoCs. In Proc. 16th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (p. 6). http://hdl.handle.net/20.500.12708/55006
  • Classifying Virtual Channel Access Control Schemes for Asynchronous NoCs / Najvirt, R., Naqvi, S. R., & Steininger, A. (2013). Classifying Virtual Channel Access Control Schemes for Asynchronous NoCs. In Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on (p. 9). http://hdl.handle.net/20.500.12708/55005
  • Particle Strikes in C-Gates: Relevance of SET Shapes / Najvirt, R., Veeravalli, V. S., & Steininger, A. (2013). Particle Strikes in C-Gates: Relevance of SET Shapes. In Proceedings of the MEDIAN Workshop 2013 (p. 4). http://hdl.handle.net/20.500.12708/55003
  • Performance of Radiation Hardening Techniques under Voltage and Temperature Variations / Veeravalli, V. S., & Steininger, A. (2013). Performance of Radiation Hardening Techniques under Voltage and Temperature Variations. In Proc. 2013 IEEE Aerospace Conference (p. 6). http://hdl.handle.net/20.500.12708/55004
  • Software Composability and Mixed Criticality for Triple Modular Redundant Architectures / Resch, S., Steininger, A., & Scherrer, C. (2013). Software Composability and Mixed Criticality for Triple Modular Redundant Architectures. In Proceedings of the 2013 SASSUR Workshop (p. 4). http://hdl.handle.net/20.500.12708/55002
  • An SET Tolerant Tree Arbiter Cell / Naqvi, S. R., Steininger, A., & Lechner, J. (2013). An SET Tolerant Tree Arbiter Cell. In Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on (p. 9). http://hdl.handle.net/20.500.12708/55001
  • SET Propagation in Micropipelines / Polzer, T., & Steininger, A. (2013). SET Propagation in Micropipelines. In 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013) (p. 8). http://hdl.handle.net/20.500.12708/54998
  • Unfaithful Glitch Propagation in Existing Binary Circuit Models / Függer, M., Nowak, T., & Schmid, U. (2013). Unfaithful Glitch Propagation in Existing Binary Circuit Models. In 2013 IEEE 19th International Symposium on Asynchronous Circuits and Systems. 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013), Santa Monica, CA, Non-EU. https://doi.org/10.1109/async.2013.9
  • Transience Bounds for Distributed Algorithms / Charron-Bost, B., Függer, M., & Nowak, T. (2013). Transience Bounds for Distributed Algorithms. In Lecture Notes in Computer Science (pp. 77–90). Lecture Notes in Computer Science. https://doi.org/10.1007/978-3-642-40229-6_6
  • Efficient Construction of Global Time in SoCs Despite Arbitrary Faults / Lenzen, C., Függer, M., Hofstätter, M., & Schmid, U. (2013). Efficient Construction of Global Time in SoCs Despite Arbitrary Faults. In 2013 Euromicro Conference on Digital System Design. 16th Euromicro Conference on Digital System Design (DSD 2013), Santander, Spain, EU. Digital System Design (DSD), 2013 Euromicro Conference on. https://doi.org/10.1109/dsd.2013.97
  • Byzantine Self-Stabilizing Clock Distribution with HEX: Implementation, Simulation, Clock Multiplication / Perner, M., Schmid, U., Lenzen, C., & Sigl, M. (2013). Byzantine Self-Stabilizing Clock Distribution with HEX: Implementation, Simulation, Clock Multiplication. In Proceedings of the 6th IARA International Conference on Dependability (DEPEND’13) (pp. 6–15). IARA. http://hdl.handle.net/20.500.12708/54927
  • The Effect of Forgetting on the Performance of a Synchronizer / Függer, M., Kößler, A., Nowak, T., Schmid, U., & Zeiner, M. (2013). The Effect of Forgetting on the Performance of a Synchronizer. In Algorithms for Sensor Systems (pp. 185–200). https://doi.org/10.1007/978-3-642-45346-5_14
  • HEX / Dolev, D., Lenzen, C., Függer, M., Schmid, U., & Perner, M. (2013). HEX. In Proceedings of the twenty-fifth annual ACM symposium on Parallelism in algorithms and architectures. SPAA ’13, Montreal, Canada, Non-EU. ACM. https://doi.org/10.1145/2486159.2486192
  • Brief announcement / John, A., Konnov, I., Schmid, U., Veith, H., & Widder, J. (2013). Brief announcement. In Proceedings of the 2013 ACM symposium on Principles of distributed computing - PODC ’13. ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing (PODC), Montreal, Kanada, Non-EU. ACM. https://doi.org/10.1145/2484239.2484285
  • Parameterized model checking of fault-tolerant distributed algorithms by abstraction / John, A., Konnov, I., Schmid, U., Veith, H., & Widder, J. (2013). Parameterized model checking of fault-tolerant distributed algorithms by abstraction. In FMCAD (pp. 201–209). http://hdl.handle.net/20.500.12708/54827
  • Towards Modeling and Model Checking Fault-Tolerant Distributed Algorithms / John, A., Konnov, I., Schmid, U., Veith, H., & Widder, J. (2013). Towards Modeling and Model Checking Fault-Tolerant Distributed Algorithms. In Model Checking Software (pp. 209–226). LNCS, Springer. https://doi.org/10.1007/978-3-642-39176-7_14
  • Muller C-Element Metastability Containment / Polzer, T., Steininger, A., & Lechner, J. (2013). Muller C-Element Metastability Containment. In Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation (pp. 103–112). Lecture Notes in Computer Science. http://hdl.handle.net/20.500.12708/54509
  • A Generic Architecture for Robust Asynchronous Communication Links / Lechner, J., & Najvirt, R. (2013). A Generic Architecture for Robust Asynchronous Communication Links. In Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation (pp. 121–130). Lecture Notes in Computer Science. http://hdl.handle.net/20.500.12708/54501
  • Gracefully Degrading Consensus and k-set Agreement under Dynamic Link Failures / Schwarz, M., Winkler, K., Schmid, U., Biely, M., & Robinson, P. (2013). Gracefully Degrading Consensus and k-set Agreement under Dynamic Link Failures (TUW-220473). http://hdl.handle.net/20.500.12708/37755
  • Final Report FWF PSRTS-Project (P20529) / Schmid, U. (2013). Final Report FWF PSRTS-Project (P20529) (TUW-235379). http://hdl.handle.net/20.500.12708/38306

2012

2011

  • Replicated processors on a single die - How independently do they fail? / Steininger, A., & Tummeltshammer, P. (2011). Replicated processors on a single die - How independently do they fail? Elektrotechnik Und Informationstechnik : E & i, 128(6), 245–250. https://doi.org/10.1007/s00502-011-0005-9
  • The Asynchronous Bounded-Cycle Model / Robinson, P., & Schmid, U. (2011). The Asynchronous Bounded-Cycle Model. Theoretical Computer Science, 412(40), 5580–5601. https://doi.org/10.1016/j.tcs.2010.08.001
  • Synchronous consensus under hybrid process and link failures / Biely, M., Schmid, U., & Weiss, B. (2011). Synchronous consensus under hybrid process and link failures. Theoretical Computer Science, 412(40), 5602–5630. https://doi.org/10.1016/j.tcs.2010.09.032
  • VLSI Implementation of a Distributed Algorithm for Fault-Tolerant Clock Generation / Steininger, A., & Fuchs, G. (2011). VLSI Implementation of a Distributed Algorithm for Fault-Tolerant Clock Generation. Journal of Electrical and Computer Engineering, 2011, 1–23. https://doi.org/10.1155/2011/936712 / Project: DARTS
  • On Self-Timed Circuits in Real-Time Systems / Ferringer, M. (2011). On Self-Timed Circuits in Real-Time Systems. International Journal of Reconfigurable Computing, 2011, 1–16. https://doi.org/10.1155/2011/972375 / Project: ARTS
  • On Efficient Checking of Link-reversal-based Concurrent Systems / Függer, M., & Widder, J. (2011). On Efficient Checking of Link-reversal-based Concurrent Systems. PUMA/RISE Seminar, Traunkirchen, Austria. http://hdl.handle.net/20.500.12708/85311
  • Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems / Biely, M., Robinson, P., & Schmid, U. (2011). Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems. In OPODIS’11 (pp. 299–312). Springer Berlin / Heidelberg. http://hdl.handle.net/20.500.12708/54094
  • Testing microcontroller software simulators / Reinbacher, T., Gückel, D., & Horauer, M. (2011). Testing microcontroller software simulators. In Workshop on Software Language Engineering for Cyber-physical Systems. WS4C 2011, Berlin, EU. http://hdl.handle.net/20.500.12708/54083 / Project: CEVTES
  • Hardware support for efficient testing of embedded software / Reinbacher, T., Steininger, A., Müller, T., Horauer, M., Brauer, J., & Kowalewski, S. (2011). Hardware support for efficient testing of embedded software. In International Conference on Mechatronic and Embedded Systems and Applications. The 7th ASME/IEEE International Conference on Mechatronic and Embedded Systems and Applications, Washington, Non-EU. ASME. http://hdl.handle.net/20.500.12708/54082 / Project: CEVTES
  • Automated test-trace inspection for microcontroller binary code / Reinbacher, T., Brauer, J., Schachinger, D., Steininger, A., & Kowalewski, S. (2011). Automated test-trace inspection for microcontroller binary code. In Runtime Verification (pp. 239–244). http://hdl.handle.net/20.500.12708/54078 / Project: CEVTES
  • Brief Announcement: Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems / Biely, M., Robinson, P., & Schmid, U. (2011). Brief Announcement: Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems. In PODC’11 (pp. 227–228). ACM. http://hdl.handle.net/20.500.12708/54097
  • Reconciling Fault-Tolerant Distributed Algorithms and Real-Time Computing / Moser, H., & Schmid, U. (2011). Reconciling Fault-Tolerant Distributed Algorithms and Real-Time Computing. In Structural Information and Communication Complexity (pp. 42–53). Springer Berlin / Heidelberg. https://doi.org/10.1007/978-3-642-22212-2_5
  • Solving k-Set Agreement with Stable Skeleton Graphs / Biely, M., Robinson, P., & Schmid, U. (2011). Solving k-Set Agreement with Stable Skeleton Graphs. In 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum. International Parallel and Distributed Processing Symposium (IPDPS), Denver, Colorado, Austria. https://doi.org/10.1109/ipdps.2011.301
  • Past Time LTL Runtime Verification for Microcontroller Binary Code / Reinbacher, T., Brauer, J., Horauer, M., Steininger, A., & Kowalewski, S. (2011). Past Time LTL Runtime Verification for Microcontroller Binary Code. In Formal Methods for Industrial Critical Systems (pp. 37–51). Springer Berlin / Heidelberg. https://doi.org/10.1007/978-3-642-24431-5_5 / Project: CEVTES
  • Precise control flow reconstruction using boolean logic / Reinbacher, T., & Brauer, J. (2011). Precise control flow reconstruction using boolean logic. In Proceedings of the ninth ACM international conference on Embedded software - EMSOFT ’11. EMSOFT2011, ACM international conference on Embedded software, Taipei, Non-EU. ACM New York. https://doi.org/10.1145/2038642.2038662 / Project: CEVTES
  • Fault-Tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation / Dolev, D., Függer, M., Lenzen, C., & Schmid, U. (2011). Fault-Tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation. In Lecture Notes in Computer Science (pp. 163–177). Springer Berlin / Heidelberg. https://doi.org/10.1007/978-3-642-24550-3_14
  • Partial is Full / Charron-Bost, B., Függer, M., Welch, J. L., & Widder, J. (2011). Partial is Full. In Structural Information and Communication Complexity (pp. 113–124). Springer Berlin / Heidelberg. https://doi.org/10.1007/978-3-642-22212-2_11
  • Full Reversal Routing as a Linear Dynamical System / Charron-Bost, B., Függer, M., Welch, J. L., & Widder, J. (2011). Full Reversal Routing as a Linear Dynamical System. In Structural Information and Communication Complexity (pp. 101–112). Springer Berlin / Heidelberg. https://doi.org/10.1007/978-3-642-22212-2_10
  • On the Performance of a Retransmission-Based Synchronizer / Nowak, T., Függer, M., & Kößler, A. (2011). On the Performance of a Retransmission-Based Synchronizer. In Structural Information and Communication Complexity (pp. 234–245). Springer Berlin / Heidelberg. http://hdl.handle.net/20.500.12708/54033
  • Brief announcement / Charron-Bost, B., Fuegger, M., Welch, J. L., & Widder, J. (2011). Brief announcement. In Proceedings of the 23rd ACM symposium on Parallelism in algorithms and architectures - SPAA ’11. SPAA ’11, San Jose, California, USA, Non-EU. ACM. https://doi.org/10.1145/1989493.1989510
  • Investigating the impact of process variations on an asynchronous Time-Triggered-Protocol controller / Ferringer, M. (2011). Investigating the impact of process variations on an asynchronous Time-Triggered-Protocol controller. In 2011 IEEE/IFIP 41st International Conference on Dependable Systems and Networks Workshops (DSN-W). Dependable Systems and Networks Workshops (DSN-W), 2011 IEEE/IFIP 41st International Conference on, Hong-Kong, Non-EU. https://doi.org/10.1109/dsnw.2011.5958834 / Project: ARTS
  • Conversion and interfacing techniques for asynchronous circuits / Ferringer, M. (2011). Conversion and interfacing techniques for asynchronous circuits. In 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. 14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2011), Cottbus, Germany, EU. https://doi.org/10.1109/ddecs.2011.5783039 / Project: ARTS
  • Conversion of two- to four-phase delay-insensitive asynchronous circuits / Ferringer, M. (2011). Conversion of two- to four-phase delay-insensitive asynchronous circuits. In 2011 IEEE EUROCON - International Conference on Computer as a Tool. EUROCON 2011, Lisbon, EU. https://doi.org/10.1109/eurocon.2011.5929318 / Project: ARTS

2010

2009

2008

2007

  • FIT-IT Projekt DARTS: Dezentrale fehlertolerante Taktgenerierung / Schmid, U., Steininger, A., & Sust, M. (2007). FIT-IT Projekt DARTS: Dezentrale fehlertolerante Taktgenerierung. Elektrotechnik und Informationstechnik : e & i, 124(1–2), 3–8. https://doi.org/10.1007/s00502-006-0409-0
  • Graphical Microcontroller Programming (GMCP) / Jahn, P., & Polzer, T. (2007). Graphical Microcontroller Programming (GMCP). IEEE International Conference on Industrial Informatics - INDIN 2007, Wien, Austria. http://hdl.handle.net/20.500.12708/84609
  • Towards a Systematic Design of Fault-Tolerant Asynchronous Circuits / Schmid, U., Steininger, A., & Veith, H. (2007). Towards a Systematic Design of Fault-Tolerant Asynchronous Circuits. In Fachtagung Zuverlässigkeit und Entwurf (pp. 173–174). VDE Verlag. http://hdl.handle.net/20.500.12708/51805
  • A Perspective of Fault-Tolerant Clock Synchronization / Schmid, U. (2007). A Perspective of Fault-Tolerant Clock Synchronization. In IEEE Symposium on Precision Clock Synchronization for Measurement, Control and Communication. 2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication, Vienna, Austria. http://hdl.handle.net/20.500.12708/52101
  • Clock Synchronization in the Byzantine-Recovery Failure Model / Anceaume, E., Delporte-Gallet, C., Fauconnier, H., Hurfin, M., & Widder, J. (2007). Clock Synchronization in the Byzantine-Recovery Failure Model. In International Conference On Principles Of DIstributed System (pp. 90–104). http://hdl.handle.net/20.500.12708/52073
  • Hardware Implementation of an SAD based stereo vision algorithm / Ambrosch, K., Humenberger, M., Kubinger, W., & Steininger, A. (2007). Hardware Implementation of an SAD based stereo vision algorithm. In Proceedings of Third IEEE Workshop on Embedded Computer Vision. Third IEEE Workshop on Embedded Computer Vision, Minneapolis, Non-EU. http://hdl.handle.net/20.500.12708/52065
  • Concepts and Tools for the Test of the Communication Sub-System of Time-Triggered Distributed Embedded Systems / Horauer, M., Armengaud, E., & Steininger, A. (2007). Concepts and Tools for the Test of the Communication Sub-System of Time-Triggered Distributed Embedded Systems. In ASME 2007 International Conference on Design Engineering Technical Conferences & Computers and Information in Engineering. International Conference on Design Engineering Technical Conferences & Computers and Information in Engineering (ASME), Las Vegas, Non-EU. http://hdl.handle.net/20.500.12708/52064 / Project: STEACS
  • A Fail-Silent Reconfigurable Superscalar Processor / Kottke, T., & Steininger, A. (2007). A Fail-Silent Reconfigurable Superscalar Processor. In 13th Pacific Rim International Symposium on Dependable Computing (PRDC’07), Melbourne (pp. 232–239). http://hdl.handle.net/20.500.12708/52063
  • Exploring Hardware Software Partitioning on the Example of a Face Recognition System / Angerer, C., Cevan, O., Fauster, L., Huang, Y., Huber, B., Legourski, V., Pirker, S., Polzer, T., Reichhard, D., Rigler, D., Schuster, A., Weirich, B., Tummeltshammer, P., & Delvai, M. (2007). Exploring Hardware Software Partitioning on the Example of a Face Recognition System. In Austrochip - Workshop on Microelectronics (pp. 121–127). http://hdl.handle.net/20.500.12708/52062
  • The Effect of Quartz Drift on Convergence-Average based Clock Synchronization / Armengaud, E., Steininger, A., & Hanzlik, A. (2007). The Effect of Quartz Drift on Convergence-Average based Clock Synchronization. In Proceedings of the 12th IEEE Conference on Emerging Technologies and Factory Automation (pp. 1123–1130). http://hdl.handle.net/20.500.12708/52061 / Project: EXTRACT
  • A Novel Interconnection Approach for Globally Asynchronous Locally Synchronous Circuits / Armengaud, E., & Forster, W. (2007). A Novel Interconnection Approach for Globally Asynchronous Locally Synchronous Circuits. In Austrochip - Workshop on Microelectronics (pp. 107–113). http://hdl.handle.net/20.500.12708/52060
  • Adopting the Scan Approach for a Fault Tolerant Asynchronous Clock Generation Circuit / Handl, T., Steininger, A., & Kempf, G. (2007). Adopting the Scan Approach for a Fault Tolerant Asynchronous Clock Generation Circuit. In Proceedings IDT’07 - The Second International Design and Test Workshop (pp. 115–119). http://hdl.handle.net/20.500.12708/52055 / Project: DARTS
  • SELF-HEALING CIRCUITS FOR SPACE-APPLICATIONS / Delvai, M., & Panhofer, T. (2007). SELF-HEALING CIRCUITS FOR SPACE-APPLICATIONS. In Proceedings of 17th INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (pp. 505–506). http://hdl.handle.net/20.500.12708/52054
  • SAFE - A Scalable Environment for Automated Transistor Level Fault Effect Analysis / Grahsl, J., Handl, T., Steininger, A., & Kempf, G. (2007). SAFE - A Scalable Environment for Automated Transistor Level Fault Effect Analysis. In Austrochip - Workshop on Microelectronics (pp. 91–98). http://hdl.handle.net/20.500.12708/52053 / Project: DARTS
  • Synchronous Consensus with Mortal Byzantines / Widder, J., Gridling, G., Weiss, B., & Blanquart, J.-P. (2007). Synchronous Consensus with Mortal Byzantines. In Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks. IEEE Conference on Dependable Systems and Networks (DSN), Philadelphia, PA, USA, Non-EU. http://hdl.handle.net/20.500.12708/52033
  • Relating Stabilizing Timing Assumptions to Stabilizing Failure Detectors Regarding Solvability and Efficiency / Biely, M., Hutle, M., Penso, L. D., & Widder, J. (2007). Relating Stabilizing Timing Assumptions to Stabilizing Failure Detectors Regarding Solvability and Efficiency. In stabilization. Ninth International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2007), Paris, EU. http://hdl.handle.net/20.500.12708/52032
  • Tolerating Corrupted Communication / Biely, M., Charron-Bost, B., Gaillard, A., Hutle, M., Schiper, A., & Widder, J. (2007). Tolerating Corrupted Communication. In 26th ACM Symposium on Principles of Distributed Computing (PODC’07) (pp. 244–253). http://hdl.handle.net/20.500.12708/52017
  • Vergleich zweier zwischen Sicherheit und Performanz rekonfigurierbarer Prozessorsysteme / Kottke, T., & Steininger, A. (2007). Vergleich zweier zwischen Sicherheit und Performanz rekonfigurierbarer Prozessorsysteme. In 19. Workshop - Testmethoden und Zuverlässigkeit von Schaltungen und Systemen. 19. ITG/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Errlangen, EU. http://hdl.handle.net/20.500.12708/51797
  • An Efficient Test Strategy for a Fault-Tolerant Clock Generator for Systems-on-Chip / Handl, T., Steininger, A., & Kempf, G. (2007). An Efficient Test Strategy for a Fault-Tolerant Clock Generator for Systems-on-Chip. In 19. Workshop - Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (pp. 66–70). http://hdl.handle.net/20.500.12708/51796 / Project: DARTS
  • Booting Clock Synchronization in Partially Synchronous Systems with Hybrid Process and Link Failures / Widder, J., & Schmid, U. (2007). Booting Clock Synchronization in Partially Synchronous Systems with Hybrid Process and Link Failures. In Distributed Computing (pp. 115–140). Springer-Verlag. http://hdl.handle.net/20.500.12708/25412
  • Time-Multiplexed Multiple Constant Multiplication / Tummeltshammer, P., Hoe, James. C., & Pueschel, M. (2007). Time-Multiplexed Multiple Constant Multiplication. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (pp. 1551–1563). IEEE. http://hdl.handle.net/20.500.12708/25411

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Note: Due to the rollout of TU Wien’s new publication database, the list below may be slightly outdated. Once the migration is complete, everything will be up to date again.

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  • Josef Widder: FIT-IT Embedded Systems Dissertationsstipendium "Distributed Computing in the Presence of Bounded Asynchrony"
    2004 / Austria
  • Ulrich Schmid: Synchronized Universal Time Coordinated for Distributed Real-Time Systems
    1997 / START-Programm / Austria
  • Ulrich Schmid: Kardinal Innitzer Förderungspreis
    1995 / Kardinal-Innitzer-Preis / Austria

Soon, this page will include additional information such as reference projects, conferences, events, and other research activities.

Until then, please visit Embedded Computing Systems’ research profile in TISS .