TU Wien Informatics

20 Years

Raimund Kirner

Privatdoz. Dipl.-Ing. Dr.techn.

Research Areas

  • Worst-Case Execution Time Analayis, Real-Time Systems, Testing of Embedded Systems, Automatic Test-Case Generation, Embedded Systems

Role

2023

2022

2021

2020

2019

  • Interfacing to Time-Triggered Communication Systems / Puschner, P., & Kirner, R. (2019). Interfacing to Time-Triggered Communication Systems. In 2019 IEEE 22nd International Symposium on Real-Time Distributed Computing (ISORC). IEEE 22nd International Symposium on Real-Time Distributed Computing (ISORC), Valencia, Spain, EU. IEEE. https://doi.org/10.1109/isorc.2019.00044

2012

  • Compiling for Time Predictability / Puschner, P., Kirner, R., Prokesch, D., & Huber, B. (2012). Compiling for Time Predictability. In Lecture Notes in Computer Science. ERCIM/EWICS/Cyberphysical Systems Workshop, Magdeburg, Germany, EU. Lecture Notes in Computer Science / Springer. https://doi.org/10.1007/978-3-642-33675-1

2011

2010

2009

  • Towards Automatic Verification of Structural Code-Coverage Preservation / Kirner, R. (2009). Towards Automatic Verification of Structural Code-Coverage Preservation. In Timing Analysis and Symbolic Computation, TASCo 2009 (p. 1). http://hdl.handle.net/20.500.12708/52927
  • On Undecidability Results of Real Programming Languages / Kirner, R., Zimmermann, W., & Richter, D. (2009). On Undecidability Results of Real Programming Languages. In J. Knoop & A. Prantl (Eds.), 15. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS 2009) (pp. 141–154). Schriftenreihe des Instituts für Computersprachen, TU Wien. http://hdl.handle.net/20.500.12708/52915
  • Automatic Calculation of Coverage Profiles for Coverage-based Testing / Kirner, R., & Haas, W. (2009). Automatic Calculation of Coverage Profiles for Coverage-based Testing. In J. Knoop & A. Prantl (Eds.), 15. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS 2009) (pp. 126–140). Schriftenreihe des Instituts für Computersprachen, TU Wien. http://hdl.handle.net/20.500.12708/52914
  • From Trusted Annotations to Verified Knowledge / Prantl, A., Knoop, J., Kirner, R., Kadlec, A., & Schordan, M. (2009). From Trusted Annotations to Verified Knowledge. In J. Knoop & A. Prantl (Eds.), 15. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS 2009) (pp. 155–166). Schriftenreihe des Instituts für Computersprachen, TU Wien. http://hdl.handle.net/20.500.12708/52781
    Projects: ALL-TIMES (2007–2010) / COSTA (2006–2009)
  • A Single-Path Chip-Multiprocessor System / Schoeberl, M., Puschner, P., & Kirner, R. (2009). A Single-Path Chip-Multiprocessor System. In Software Technologies for Embedded and Ubiquitous Systems (pp. 47–57). Lecture Notes in Computer Science / Springer Verlag. https://doi.org/10.1007/978-3-642-10265-3_5
  • Towards Adaptable Control Flow Segmentation for measurement-Based Execution Time Analysis / Zolda, M., Bünte, S., & Kirner, R. (2009). Towards Adaptable Control Flow Segmentation for measurement-Based Execution Time Analysis. In 17th International Conference on Real-Time and Network Systems, Proceedings (p. 10). http://hdl.handle.net/20.500.12708/52928
  • Precise Worst-Case Execution Time Analysis for Processors with Timing Anomalies / Kirner, R., Kadlec, A., & Puschner, P. (2009). Precise Worst-Case Execution Time Analysis for Processors with Timing Anomalies. In 2009 21st Euromicro Conference on Real-Time Systems. Euromicro Conference on Real-Time Systems (ECRTS), Delft, Netherlands, Austria. IEEE computer society, CPS. https://doi.org/10.1109/ecrts.2009.8
  • From Trusted Annotations to Verified Knowledge / Prantl, A., Knoop, J., Kirner, R., Kadlec, A., & Schordan, M. (2009). From Trusted Annotations to Verified Knowledge. In N. Holsti (Ed.), Worst-Case Execution Time Analysis (p. 11). Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany. http://hdl.handle.net/20.500.12708/52856
  • Model-Driven Design and Organic Computing -- Combinable Strategies? / Puschner, P., & Kirner, R. (2009). Model-Driven Design and Organic Computing -- Combinable Strategies? In 2009 IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing. IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Newport Beach, CA, USA, Austria. IEEE. https://doi.org/10.1109/isorc.2009.22
  • Towards Composable Timing for Real-Time Software / Puschner, P., Kirner, R., & Pettit, R. G. (2009). Towards Composable Timing for Real-Time Software. In 2009 Software Technologies for Future Dependable Distributed Systems (pp. 1–5). IEEE. http://hdl.handle.net/20.500.12708/52849
  • From Trusted Annotations to Verified Knowledge / Prantl, A., Knoop, J., Kirner, R., Schordan, M., & Kadlec, A. (2009). From Trusted Annotations to Verified Knowledge. In N. Holsti (Ed.), Preliminary Proceedings of the 9th International Workshop on Worst-Case Execution Time Analysis (WCET 2009) (pp. 35–45). http://hdl.handle.net/20.500.12708/52710
  • From Trusted Annotations to Verified Knowledge / Prantl, A., Knoop, J., Kirner, R., Kadlec, A., & Schordan, M. (2009). From Trusted Annotations to Verified Knowledge. In N. Holsti (Ed.), Worst-Case Execution Time Analysis (pp. 39–49). Verlag Oesterreichische Computer Gesellschaft. http://hdl.handle.net/20.500.12708/52855

2008

  • Supersensitive tin oxide nanosensors for gas detection / Tischner, A., Köck, A., Maier, T., Edtmaier, C., Gspan, C., & Kothleitner, G. (2008). Supersensitive tin oxide nanosensors for gas detection. In H. Kaiser & R. Kirner (Eds.), Junior Scientists Conference 2008 Proceedings (pp. 145–146). http://hdl.handle.net/20.500.12708/46228
  • Technical criteria for the comparison of modern ERP system for the usage in orchestra companies at the case study of Dynamics AX 2009 / Gall, M., & Sterba, C. (2008). Technical criteria for the comparison of modern ERP system for the usage in orchestra companies at the case study of Dynamics AX 2009. In H. Kaiser & R. Kirner (Eds.), Proceedings of the Junior Scientist Conference 2008 (pp. 37–38). http://hdl.handle.net/20.500.12708/52258
  • Test Coverage Analysis and Preservation for Requirements-Based Testing of Safety-Critical Systems / Kirner, R., & Kandl, S. (2008). Test Coverage Analysis and Preservation for Requirements-Based Testing of Safety-Critical Systems. ERCIM NEWS, 75(75), 40–41. http://hdl.handle.net/20.500.12708/171017
  • WCET Tool Challenge 2008: Report / Holsti, N., Gustafsson, J., Bernat, G., Ballabriga, C., Bonenfant, A., Bourgade, R., Cassé, H., Cordes, D., Kadlec, A., Kirner, R., Knoop, J., Lokuciejewski, P., Merriam, N., de Michiel, M., Prantl, A., Rieder, B., Rochange, C., Sainrat, P., & Schordan, M. (2008). WCET Tool Challenge 2008: Report. In Worst-Case Execution Time Analysis; Proceedings of the 8th International Workshop (WCET 2008) (pp. 149–171). Österreichische Computer Gesellschaft. http://hdl.handle.net/20.500.12708/52407
    Project: COSTA (2006–2009)
  • Divide and Measure: CFG Segmentation for the Measurement-Based Analysis of Resource Consumption / Zolda, M., & Kirner, R. (2008). Divide and Measure: CFG Segmentation for the Measurement-Based Analysis of Resource Consumption. In Proceedings of the Junior Scientist Conference 2008 (pp. 117–118). http://hdl.handle.net/20.500.12708/52644
  • Measurement-Based Timing Analysis / Wenzel, I., Kirner, R., Rieder, B., & Puschner, P. (2008). Measurement-Based Timing Analysis. In Communications in Computer and Information Science (pp. 430–444). Springer Berlin Heidelberg. https://doi.org/10.1007/978-3-540-88479-8_30
  • Towards a Common WCET Annotation Language: Essential Ingredients / Kadlec, A., Kirner, R., Puschner, P., Prantl, A., Schordan, M., & Knoop, J. (2008). Towards a Common WCET Annotation Language: Essential Ingredients. In Programmiersprachen und Rechenkonzepte (p. 12). Technischer Bericht des Instituts für Informatik der Christian-Albrechts Universität zu Kiel. http://hdl.handle.net/20.500.12708/52531
  • WCET Annotation Languages Reconsidered: The Annotation Language Challenge / Kadlec, A., Kirner, R., Knoop, J., Prantl, A., Schordan, M., & Wenzel, I. (2008). WCET Annotation Languages Reconsidered: The Annotation Language Challenge. In Programmiersprachen und Rechenkonzepte (p. 10). Technischer Bericht des Instituts für Informatik der Christian-Albrechts Universität zu Kiel. http://hdl.handle.net/20.500.12708/52530
  • The Acquaintance of Hardware Timing Effects: A Sine Qua Non to Validate Temporal Requirements in Embedded Real Time Systems / Bünte, S., & Kirner, R. (2008). The Acquaintance of Hardware Timing Effects: A Sine Qua Non to Validate Temporal Requirements in Embedded Real Time Systems. In Proceedings of the Junior Scientist Conference 2008 (pp. 115–116). http://hdl.handle.net/20.500.12708/52464
  • Obstacles in Worst-Case Execution Time Analysis / Kirner, R., & Puschner, P. (2008). Obstacles in Worst-Case Execution Time Analysis. In 2008 11th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC). The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, Orlando, Florida, USA, Non-EU. IEEE Computer Society. https://doi.org/10.1109/isorc.2008.65
  • Toward Libraries for Real-Time Java / Harmon, T., Schoeberl, M., Kirner, R., & Klefstad, R. (2008). Toward Libraries for Real-Time Java. In 2008 11th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC). The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, Orlando, Florida, USA, Non-EU. IEEE Computer Society. https://doi.org/10.1109/isorc.2008.73
  • A Modular Worst-case Execution Time Analysis Tool for Java Processors / Harmon, T., Schoeberl, M., Kirner, R., & Klefstad, R. (2008). A Modular Worst-case Execution Time Analysis Tool for Java Processors. In 2008 IEEE Real-Time and Embedded Technology and Applications Symposium. 14th IEEE Real-Time and Embedded Technology and Applications Symposium, St. Louis, Missouri, USA, Non-EU. IEEE Computer Society. https://doi.org/10.1109/rtas.2008.34
  • Towards a Common WCET Annotation Languge: Essential Ingredients / Kirner, R., Kadlec, A., Puschner, P., Prantl, A., Schordan, M., & Knoop, J. (2008). Towards a Common WCET Annotation Languge: Essential Ingredients. In Worst-Case Execution Time Analysis; Proceedings of the 8th International Workshop (WCET 2008) (pp. 53–65). Österreichische Computer Gesellschaft. http://hdl.handle.net/20.500.12708/52349
  • Optimization of communication by analyzing the interlocutor's wording / Kellner, G. (2008). Optimization of communication by analyzing the interlocutor’s wording. In H. Kaiser & R. Kirner (Eds.), Proceedings of the Junior Scientist Conference 2008 (pp. 93–94). http://hdl.handle.net/20.500.12708/52314
  • MapFace - A Graphical Editor to Support the Semantic Annotation of Medical Text / Gschwandtner, T., Kaiser, K., & Miksch, S. (2008). MapFace - A Graphical Editor to Support the Semantic Annotation of Medical Text. In H. Kaiser & R. Kirner (Eds.), Proceedings of the Junior Scientist Conference 2008 (pp. 91–92). http://hdl.handle.net/20.500.12708/52313
  • Decomposing HEX-Programs: Preliminary Results / Eiter, T., Fink, M., & Krennwallner, T. (2008). Decomposing HEX-Programs: Preliminary Results. In H. Kaiser & R. Kirner (Eds.), Proceedings of the Junior Scientist Conference 2008 (pp. 29–30). http://hdl.handle.net/20.500.12708/52311
    Project: HEX-Programme (2008–2012)
  • Silver plated tungsten carbide powders for electrical contact materials with improved homogeneity / Hula, R. C., & Edtmaier, C. (2008). Silver plated tungsten carbide powders for electrical contact materials with improved homogeneity. In H. Kaiser & R. Kirner (Eds.), Junior Scientists Conference 2008 Proceedings (pp. 153–154). http://hdl.handle.net/20.500.12708/46227
  • Graphics Versus Spoken Language in Pedestrian Navigation / Ortag, F., & Gartner, G. (2008). Graphics Versus Spoken Language in Pedestrian Navigation. In H. Kaiser & R. Kirner (Eds.), Proceedings of the Junior Scientist Conference 2008 (pp. 107–108). http://hdl.handle.net/20.500.12708/42288
  • Random bipartite graphs and their application to cuchoo hashing / Kutzelnigg, R., & Drmota, M. (2008). Random bipartite graphs and their application to cuchoo hashing. In H. Kaiser & R. Kirner (Eds.), Proceedings of the Junior Scientist Conference 2008 (pp. 281–282). Technische Universität Wien. http://hdl.handle.net/20.500.12708/40804
  • Worst-Case Execution Time Analysis (Proceedings of the 8th International Workshop WCET 2008) / Kirner, R. (Ed.). (2008). Worst-Case Execution Time Analysis (Proceedings of the 8th International Workshop WCET 2008). Österreichische Computer Gesellschaft. http://hdl.handle.net/20.500.12708/22792
  • Junior Scientist Conference 2008, Proceedings / Kaiser, H., & Kirner, R. (Eds.). (2008). Junior Scientist Conference 2008, Proceedings. TU Wien. http://hdl.handle.net/20.500.12708/22862

2007

  • Cross-Platform Verification Framework for Embedded Systems / Wenzel, I., Kirner, R., Rieder, B., & Puschner, P. (2007). Cross-Platform Verification Framework for Embedded Systems. Lecture Notes in Computer Science, 4761, 137–148. http://hdl.handle.net/20.500.12708/169639
  • On the Difficulty of Building a Precise Timing Model for Real-Time Programming / Kadlec, A., & Kirner, R. (2007). On the Difficulty of Building a Precise Timing Model for Real-Time Programming. In 14. Kolloquium Programmiersprachen und Grundlagen der Programmierung (p. 7). http://hdl.handle.net/20.500.12708/52113
  • On the Halting Problem of Finite-State Programs / Kirner, R. (2007). On the Halting Problem of Finite-State Programs. In 14. Kolloquium Programmiersprachen und Grundlagen der Programmierung (p. 6). http://hdl.handle.net/20.500.12708/52078
  • SCCP/x / Kirner, R. (2007). SCCP/x. In Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems  - CASES ’07. International Conference on Compilers, Architecture and Synthesis for Embedded Systems [CASES 07], Salzburg, Austria, Austria. ACM. https://doi.org/10.1145/1289881.1289890
  • Modeling the function cache for worst-case execution time analysis / Kirner, R., & Schoeberl, M. (2007). Modeling the function cache for worst-case execution time analysis. In Proceedings of the 44th annual conference on Design automation - DAC ’07. 44th Design Automation Conference (DAC’07), San Diego, California/USA, Non-EU. ACM. https://doi.org/10.1145/1278480.1278603
  • WCET Analysis: The Annotation Language Challenge / Kirner, R., Knoop, J., Prantl, A., Schordan, M., & Wenzel, I. (2007). WCET Analysis: The Annotation Language Challenge. In Preliminary Proceedings of the 7th International Workshop on Worst-Case Execution Time Analysis (satellite event to ECRTS´07) (pp. 77–92). http://hdl.handle.net/20.500.12708/52007
  • WCET Analysis: The Annotation Language Challenge / Kirner, R., Knoop, J., Prantl, A., Schordan, M., & Wenzel, I. (2007). WCET Analysis: The Annotation Language Challenge. In Post-Workshop Proceedings of the 7th International Workshop on Worst-Case Execution Time Analysis (pp. 83–99). http://hdl.handle.net/20.500.12708/51989
  • Time-Predictable Task Preemption for Real-Time Systems with Direct-Mapped Instruction Cache / Kirner, R., & Puschner, P. (2007). Time-Predictable Task Preemption for Real-Time Systems with Direct-Mapped Instruction Cache. In 10th IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC’07) (pp. 87–92). IEEE. http://hdl.handle.net/20.500.12708/51885
  • Automated Formal Verification and Testing of C Programs for Embedded Systems / Kandl, S., Kirner, R., & Puschner, P. (2007). Automated Formal Verification and Testing of C Programs for Embedded Systems. In 10th IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC 2007) (pp. 373–381). IEEE. http://hdl.handle.net/20.500.12708/51884
  • Cross-Platform Verification Framework for Embedded Systems / Wenzel, I., Kirner, R., Rieder, B., & Puschner, P. (2007). Cross-Platform Verification Framework for Embedded Systems. In The 5th IFIP Workshop on Software Technologies for Future Embedded & Ubiquitous Systems (p. 12). http://hdl.handle.net/20.500.12708/51860

2006

2005

  • Impact of Dependable Software Development / Wenzel, I., Kirner, R., Schlager, M., Rieder, B., & Huber, B. (2005). Impact of Dependable Software Development. In EUROCON 2005 - The International Conference on “Computer as a Tool” (pp. 575–578). IEEE. http://hdl.handle.net/20.500.12708/51093
  • Timing Analysis for Embedded Systems and Time-Predictable Computing / Puschner, P., & Kirner, R. (2005). Timing Analysis for Embedded Systems and Time-Predictable Computing. Siemens PSE Technology Day, Vienna, Austria, Austria. http://hdl.handle.net/20.500.12708/84449
  • Principles of Timing Anomalies in Superscalar Processors / Wenzel, I., Kirner, R., Puschner, P., & Rieder, B. (2005). Principles of Timing Anomalies in Superscalar Processors. In Proceedings of the Fifth International Conference on Quality Software (pp. 295–303). http://hdl.handle.net/20.500.12708/51092
  • Classification of WCET Analysis Techniques / Kirner, R., & Puschner, P. (2005). Classification of WCET Analysis Techniques. In Proceedings of the 8th IEEE International Symposium on Object-Oriented Real-time distributed Computing (ISORC’05) (pp. 190–199). IEEE Computer Society. http://hdl.handle.net/20.500.12708/51015
  • Measurement-Based Worst-Case Execution Time Analysis / Wenzel, I., Kirner, R., Rieder, B., & Puschner, P. (2005). Measurement-Based Worst-Case Execution Time Analysis. In Proceedings of the third Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS) (pp. 7–10). IEEE. http://hdl.handle.net/20.500.12708/50995
  • Automatic Timing Model Generation by CFG Partitioning and Model Checking / Wenzel, I., Rieder, B., Kirner, R., & Puschner, P. (2005). Automatic Timing Model Generation by CFG Partitioning and Model Checking. In Proceedings of the Conference on Design, Automation and Test in Europe (DATE 2005) (pp. 606–611). http://hdl.handle.net/20.500.12708/50989

2003

2002

2001

  • Using Real Hardware to Create an Accurate Timing Model for Execution-Time Analysis / Atanassov, P., Puschner, P., & Kirner, R. (2001). Using Real Hardware to Create an Accurate Timing Model for Execution-Time Analysis. In Proceedings of the IEEE International Workshop on Real-Time Embeeded Systems (in conjunction with 22nd IEEE RTSS 2001). IEEE Workshop on Real-Time Embedded Systems, London, United Kingdom, Austria. http://hdl.handle.net/20.500.12708/50873
  • Transformation of Path Information for WCET Analysis during Compilation / Kirner, R., & Puschner, P. (2001). Transformation of Path Information for WCET Analysis during Compilation. In Proceedings of the 13th Euromicro Conference on Real-Time Systems (ECRTS2001) (pp. 29–36). http://hdl.handle.net/20.500.12708/50878
  • WCET Analysis for Systems Modelled in Matlab/Simulink / Kirner, R., Lang, R., & Puschner, P. (2001). WCET Analysis for Systems Modelled in Matlab/Simulink. In Proceedings of the IEEE Real-Time Systems Symposium - Work in Progress Proceedings (pp. 33–36). http://hdl.handle.net/20.500.12708/50872

2000

 

  • Mobilitätsstipendium der Creditanstalt AG (wird für aussergewöhnliche Dissertationen an der Technischen Universität Wien verliehen)
    2003 / Austria

Soon, this page will include additional information such as reference projects, activities as journal reviewer and editor, memberships in councils and committees, and other research activities.

Until then, please visit Raimund Kirner’s research profile in TISS .