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Matthias Függer

Dipl.-Ing. Dr.techn.

Research Areas

  • Distributed systems, Mathematical analysis of algorithms, fault-tolerant systems, Asynchronous design
Matthias Függer

Role

Contact

2026S

 

2025

2024

  • A Hybrid Delay Model for Interconnected Multi-Input Gates / Ferdowsi, A., Függer, M., Salzmann, J., & Schmid, U. (2024). A Hybrid Delay Model for Interconnected Multi-Input Gates. In 2023 26th Euromicro Conference on Digital System Design (DSD) (pp. 381–390). IEEE. https://doi.org/10.1109/DSD60849.2023.00060
    Project: DMAC (2019–2024)

2023

  • On the Susceptibility of QDI Circuits to Transient Faults / Shehaby, R. E., Függer, M., & Steininger, A. (2023). On the Susceptibility of QDI Circuits to Transient Faults. In L. Petrucci & J. Sproston (Eds.), Formal Modeling and Analysis of Timed Systems : 21st International Conference, FORMATS 2023, Antwerp, Belgium, September 19–21, 2023, Proceedings (pp. 69–85). Springer LNCS. https://doi.org/10.1007/978-3-031-42626-1_5
  • Continuity of Thresholded Mode-Switched ODEs and Digital Circuit Delay Models / Ferdowsi, A., Függer, M., Nowak, T., & Schmid, U. (2023). Continuity of Thresholded Mode-Switched ODEs and Digital Circuit Delay Models. In HSCC ’23: Proceedings of the 26th ACM International Conference on Hybrid Systems: Computation and Control. 26th ACM International Conference on Hybrid Systems: Computation and Control (HSCC’23), San Antonio, United States of America (the). Association for Computing Machinery. https://doi.org/10.1145/3575870.3587125
    Project: DMAC (2019–2024)

2022

  • On Specifications and Proofs of Timed Circuits / Függer, M., Lenzen, C., & Schmid, U. (2022). On Specifications and Proofs of Timed Circuits. In J.-F. Raskin, K. Chatterjee, L. Doyen, & R. Mayumdar (Eds.), Principles of Systems Design : Essays Dedicated to Thomas A. Henzinger on the Occasion of His 60th Birthday (Vol. 13660, pp. 107–130). Springer. https://doi.org/10.1007/978-3-031-22337-2
    Project: DMAC (2019–2024)

2021

  • A Composable Glitch-Aware Delay Model / Maier, J., Öhlinger, D., Schmid, U., Függer, M., & Nowak, T. (2021). A Composable Glitch-Aware Delay Model. In GLSVLSI ’21: Proceedings of the 2021 Great Lakes Symposium on VLSI (pp. 147–154). Association for Computing Machinery. https://doi.org/10.1145/3453688.3461519
    Downloads: MP4 (85.5 MB) / PDF (1.28 MB)
    Projects: ADynNet (2016–2020) / DMAC (2019–2024)
  • Generation of a fault-tolerant clock through redundant crystal oscillators / Dür, W., Függer, M., & Steininger, A. (2021). Generation of a fault-tolerant clock through redundant crystal oscillators. Microelectronics Reliability, 120, 1–11. https://doi.org/10.1016/j.microrel.2021.114088
    Download: PDF (1.46 MB)

2020

2019

  • Transistor-Level Analysis of Dynamic Delay Models / Maier, J., Függer, M., Nowak, T., & Schmid, U. (2019). Transistor-Level Analysis of Dynamic Delay Models. In 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC). 25th IEEE International Symposium on Asynchronous Circuits and Systems, Hirosaki, Japan. IEEE. https://doi.org/10.1109/ASYNC.2019.00019
    Download: PDF (457 KB)
  • The involution tool for accurate digital timing and power analysis / Öhlinger, D., Maier, J., Függer, M., & Schmid, U. (2019). The involution tool for accurate digital timing and power analysis. In 2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS). 29th International Symposium on Power and Timing Modeling, Optimization and Simulation, Rhodos, Greece. https://doi.org/10.1109/PATMOS.2019.8862165
    Download: PDF (301 KB)
  • Special Issue "Selected Papers from the 24th IEEE International Symposium on Asynchronous Circuits and Systems - ASYNC 2018" / Krstic, M., Jones, I., Steininger, A., & Függer, M. (2019). Special Issue “Selected Papers from the 24th IEEE International Symposium on Asynchronous Circuits and Systems - ASYNC 2018.” Journal of Low Power Electronics and Applications, 9(2), 2. http://hdl.handle.net/20.500.12708/143834

2018

  • A Faithful Binary Circuit Model with Adversarial Noise / Függer, M., Maier, J., Najvirt, R., Nowak, T., & Schmid, U. (2018). A Faithful Binary Circuit Model with Adversarial Noise. In 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE). 2018 Design, Automation & Test in Europe Conference & Exhibition, Dresden, Germany. IEEE. https://doi.org/10.23919/DATE.2018.8342219
    Download: PDF (1.11 MB)
  • Tight Bounds for Asymptotic and Approximate Consensus / Függer, M., Nowak, T., & Schwarz, M. (2018). Tight Bounds for Asymptotic and Approximate Consensus. In Proceedings of the 2018 ACM Symposium on Principles of Distributed Computing. 37th ACM Symposium on Principles of Distributed Computing (PODC’18), Egham, United Kingdom of Great Britain and Northern Ireland (the). ACM. https://doi.org/10.1145/3212734.3212762
  • Fast All-Digital Clock Frequency Adaptation Circuit for Voltage Droop Tolerance / Fuegger, M., Kinali, A., Lenzen, C., & Wiederhake, B. (2018). Fast All-Digital Clock Frequency Adaptation Circuit for Voltage Droop Tolerance. In 2018 24th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC). 24th IEEE International Symposium on Asynchronous Circuits and Systems, Wien, Austria. Proceedings of the 24th IEEE International Symposium on Asynchronous Circuits and Systems. https://doi.org/10.1109/async.2018.00025

2017

  • Metastability Tolerant Computing / Tarawneh, G., Függer, M., & Lenzen, C. (2017). Metastability Tolerant Computing. In 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC). 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), San Diego, California, United States of America (the). IEEE Computer Society. https://doi.org/10.1109/async.2017.9
  • Metastability-Aware Memory-Efficient Time-to-Digital Converters / Függer, M., Kinali, A., Lenzen, C., & Polzer, T. (2017). Metastability-Aware Memory-Efficient Time-to-Digital Converters. In 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC). 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017), San Diego, California, United States of America (the). IEEE Computer Society. https://doi.org/10.1109/async.2017.12
  • Brief Announcement: Lower Bounds for Asymptotic Consensus in Dynamic Networks / Függer, M., Nowak, T., & Schwarz, M. (2017). Brief Announcement: Lower Bounds for Asymptotic Consensus in Dynamic Networks. In A. W. Richa (Ed.), 31st International Symposium on Distributed Computing (DISC 2017) (p. 3). Schloss Dagstuhl – Leibniz-Zentrum für Informatik. https://doi.org/10.4230/LIPIcs.DISC.2017.51
  • New transience bounds for max-plus linear systems / Charron-Bost, B., Függer, M., & Nowak, T. (2017). New transience bounds for max-plus linear systems. Discrete Applied Mathematics, 219, 83–99. https://doi.org/10.1016/j.dam.2016.11.003

2016

  • Unfaithful Glitch Propagation in Existing Binary Circuit Models / Függer, M., Nowak, T., & Schmid, U. (2016). Unfaithful Glitch Propagation in Existing Binary Circuit Models. IEEE Transactions on Computers, 65(3), 964–978. https://doi.org/10.1109/tc.2015.2435791
  • Fast, Robust, Quantizable Approximate Consensus / Charron-Bost, B., Függer, M., & Nowak, T. (2016). Fast, Robust, Quantizable Approximate Consensus. In I. Chatzigiannakis, M. Mitzenmacher, Y. Rabani, & D. Sangiorgi (Eds.), Proceedings 43rd International Colloquium on Automata, Languages, and Programming (ICALP’16) (pp. 137:1-137:14). Leibniz International Proceedings in Informatics (LIPIcs). https://doi.org/10.4230/LIPIcs.ICALP.2016.137
  • HEX: Scaling Honeycombs is Easier than Scaling Clock Trees / Dolev, D., Függer, M., Lenzen, C., Perner, M., & Schmid, U. (2016). HEX: Scaling Honeycombs is Easier than Scaling Clock Trees. Journal of Computer and System Sciences, 82(5), 929–956. https://doi.org/10.1016/j.jcss.2016.03.001

2015

  • Experimental Validation of a Faithful Binary Circuit Model / Najvirt, R., Függer, M., Nowak, T., Schmid, U., Hofbauer, M., & Schweiger, K. (2015). Experimental Validation of a Faithful Binary Circuit Model. In Proceedings of the 25th edition on Great Lakes Symposium on VLSI. Great Lakes Symposium on VLSI (GLSVLSI’15), Pittsburgh, United States of America (the). https://doi.org/10.1145/2742060.2742081
  • Towards binary circuit models that faithfully capture physical solvability / Függer, M., Najvirt, R., Nowak, T., & Schmid, U. (2015). Towards binary circuit models that faithfully capture physical solvability. In Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE’15) (pp. 1455–1460). http://hdl.handle.net/20.500.12708/56310
  • Optimal Strategies for Repeated Leader Election / Zeiner, M., Függer, M., Nowak, T., & Schmid, U. (2015). Optimal Strategies for Repeated Leader Election. Joint Austrian-Hungarian Mathematical Conference 2015, Györ, Hungary. http://hdl.handle.net/20.500.12708/86086
  • The effect of forgetting on the performance of a synchronizer / Függer, M., Kößler, A., Nowak, T., Schmid, U., & Zeiner, M. (2015). The effect of forgetting on the performance of a synchronizer. Performance Evaluation, 93, 1–16. https://doi.org/10.1016/j.peva.2015.08.002
  • Time Complexity of Link Reversal Routing / Charron-Bost, B., Függer, M., Welch, J. L., & Widder, J. (2015). Time Complexity of Link Reversal Routing. ACM Transactions on Algorithms, 11(3), 1–39. https://doi.org/10.1145/2644815
  • Fault-tolerant Distributed Systems in Hardware / Dolev, D., Függer, M., Lenzen, C., Schmid, U., & Steininger, A. (2015). Fault-tolerant Distributed Systems in Hardware. Bulletin of the EATCS, 2(116), 43. http://hdl.handle.net/20.500.12708/151760

2014

2013

  • HEX / Dolev, D., Lenzen, C., Függer, M., Schmid, U., & Perner, M. (2013). HEX. In Proceedings of the twenty-fifth annual ACM symposium on Parallelism in algorithms and architectures. SPAA ’13, Montreal, Canada. ACM. https://doi.org/10.1145/2486159.2486192
  • Transience Bounds for Distributed Algorithms / Charron-Bost, B., Függer, M., & Nowak, T. (2013). Transience Bounds for Distributed Algorithms. In Formal Modeling and Analysis of Timed Systems 11th International Conference, FORMATS 2013, Buenos Aires, Argentina, August 29-31, 2013, Proceedings (pp. 77–90). Lecture Notes in Computer Science. https://doi.org/10.1007/978-3-642-40229-6_6
  • Unfaithful Glitch Propagation in Existing Binary Circuit Models / Függer, M., Nowak, T., & Schmid, U. (2013). Unfaithful Glitch Propagation in Existing Binary Circuit Models. In 2013 IEEE 19th International Symposium on Asynchronous Circuits and Systems. 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013), Santa Monica, United States of America (the). https://doi.org/10.1109/async.2013.9
  • The Effect of Forgetting on the Performance of a Synchronizer / Függer, M., Kößler, A., Nowak, T., Schmid, U., & Zeiner, M. (2013). The Effect of Forgetting on the Performance of a Synchronizer. In Algorithms for Sensor Systems (pp. 185–200). https://doi.org/10.1007/978-3-642-45346-5_14
  • Efficient Construction of Global Time in SoCs Despite Arbitrary Faults / Lenzen, C., Függer, M., Hofstätter, M., & Schmid, U. (2013). Efficient Construction of Global Time in SoCs Despite Arbitrary Faults. In 2013 Euromicro Conference on Digital System Design. 16th Euromicro Conference on Digital System Design (DSD 2013), Santander, Spain. Digital System Design (DSD), 2013 Euromicro Conference on. https://doi.org/10.1109/dsd.2013.97
  • FATAL+HEX: Fault-Tolerant Self-Stabilizing Clock Generation+Distribution / Dolev, D., Függer, M., Hofstätter, M., Lenzen, C., Perner, M., Posch, M., Schmid, U., Sigl, M., & Steininger, A. (2013). FATAL+HEX: Fault-Tolerant Self-Stabilizing Clock Generation+Distribution. Poster Session at the CSAIL Industry Affiliates Program (CSAIL-IAP) Annual Meeting, Cambridge, United States of America (the). http://hdl.handle.net/20.500.12708/85710
  • Runtime verification of embedded real-time systems / Reinbacher, T., Függer, M., & Brauer, J. (2013). Runtime verification of embedded real-time systems. Formal Methods in System Design, 44(3), 203–239. https://doi.org/10.1007/s10703-013-0199-z
    Project: CEVTES (2010–2013)
  • On the performance of a retransmission-based synchronizer / Nowak, T., Függer, M., & Kößler, A. (2013). On the performance of a retransmission-based synchronizer. Theoretical Computer Science, 509, 25–39. https://doi.org/10.1016/j.tcs.2012.04.035
  • The Effect of Forgetting on the Performance of a Synchronizer / Zeiner, M., Függer, M., Schmid, U., Kößler, A., & Nowak, T. (2013). The Effect of Forgetting on the Performance of a Synchronizer. 18th ÖMG Congress and Annual DMV Meeting, Universität Innsbruck, Austria. http://hdl.handle.net/20.500.12708/85720

2012

  • Towards Self-stabilizing Byzantine Fault-Tolerant Clock Generation in Systems-on-Chip / Dolev, D., Függer, M., Lenzen, C., & Schmid, U. (2012). Towards Self-stabilizing Byzantine Fault-Tolerant Clock Generation in Systems-on-Chip. NITRD Workshop, Baltimore, United States of America (the). http://hdl.handle.net/20.500.12708/85536
  • Efficient Checking of Link-Reversal-Based Concurrent Systems / Függer, M., & Widder, J. (2012). Efficient Checking of Link-Reversal-Based Concurrent Systems. In CONCUR 2012- Concurrency Theory 23rd International Conference, CONCUR 2012, Newcastle upon Tyne, September 4-7, 2012. Proceedings (pp. 486–499). Lecture Notes in Computer Science. Springer Verlag. https://doi.org/10.1007/978-3-642-32940-1_34
  • Brief Announcement: The Degrading Effect of Forgetting on a Synchronizer / Függer, M., Kößler, A., Nowak, T., & Zeiner, M. (2012). Brief Announcement: The Degrading Effect of Forgetting on a Synchronizer. In Stabilization, Safety, and Security of Distributed Systems (pp. 90–91). Lecture Notes in Computer Science. http://hdl.handle.net/20.500.12708/54498
  • Real-Time Runtime Verification on Chip / Reinbacher, T., Függer, M., & Brauer, J. (2012). Real-Time Runtime Verification on Chip. In Proc. of RV 2012: the 3rd International Conference on Runtime Verification. RV 2012: the 3rd International Conference on Runtime Verification, Istanbul, Turkey. LNCS / Springer. http://hdl.handle.net/20.500.12708/54500
    Project: CEVTES (2010–2013)
  • Reconciling fault-tolerant distributed computing and systems-on-chip / Függer, M., & Schmid, U. (2012). Reconciling fault-tolerant distributed computing and systems-on-chip. Distributed Computing, 24(6), 323–355. https://doi.org/10.1007/s00446-011-0151-7

2011

  • Brief announcement / Charron-Bost, B., Fuegger, M., Welch, J. L., & Widder, J. (2011). Brief announcement. In Proceedings of the 23rd ACM symposium on Parallelism in algorithms and architectures - SPAA ’11. SPAA ’11, San Jose, United States of America (the). ACM. https://doi.org/10.1145/1989493.1989510
  • Partial is Full / Charron-Bost, B., Függer, M., Welch, J. L., & Widder, J. (2011). Partial is Full. In Structural Information and Communication Complexity (pp. 113–124). Springer Berlin / Heidelberg. https://doi.org/10.1007/978-3-642-22212-2_11
  • Full Reversal Routing as a Linear Dynamical System / Charron-Bost, B., Függer, M., Welch, J. L., & Widder, J. (2011). Full Reversal Routing as a Linear Dynamical System. In Structural Information and Communication Complexity (pp. 101–112). Springer Berlin / Heidelberg. https://doi.org/10.1007/978-3-642-22212-2_10
  • On the Performance of a Retransmission-Based Synchronizer / Nowak, T., Függer, M., & Kößler, A. (2011). On the Performance of a Retransmission-Based Synchronizer. In Structural Information and Communication Complexity (pp. 234–245). Springer Berlin / Heidelberg. http://hdl.handle.net/20.500.12708/54033
  • Fault-Tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation / Dolev, D., Függer, M., Lenzen, C., & Schmid, U. (2011). Fault-Tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation. In Stabilization, Safety, and Security of Distributed Systems (pp. 163–177). Springer Berlin / Heidelberg. https://doi.org/10.1007/978-3-642-24550-3_14
  • On Efficient Checking of Link-reversal-based Concurrent Systems / Függer, M., & Widder, J. (2011). On Efficient Checking of Link-reversal-based Concurrent Systems. PUMA/RISE Seminar, Traunkirchen, Austria. http://hdl.handle.net/20.500.12708/85311

2010

2009

2008

2006

2005