Hermann Kopetz
Em.O.Univ.Prof. Dr.phil. Dr.h.c.
Research Areas
- Real-Time Systems, Dependability, Safty, Distributed Systems, Software Engineering, Embedded Systems
Role
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Emerit. Professor
Cyber-Physical Systems, E191-01
Projects
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Architecture for Multi-criticality Agile Dependable Evolutionary Open System-of-Systems
2013 – 2016 / European Commission
Publications
2019
- Simplicity is Complex / Kopetz, H. (Ed.). (2019). Simplicity is Complex. Springer. https://doi.org/10.1007/978-3-030-20411-2
2016
- Basic Concepts on Systems of Systems / Ceccarelli, A., Bondavalli, A., Froemel, B., Hoeftberger, O., & Kopetz, H. (2016). Basic Concepts on Systems of Systems. In Cyber-Physical Systems of Systems (pp. 1–39). Springer International Publishing. https://doi.org/10.1007/978-3-319-47590-5_1
- Emergence in Cyber-Physical Systems-of-Systems (CPSoSs) / Kopetz, H., Bondavalli, A., Brancati, F., Frömel, B., Höftberger, O., & Iacob, S. (2016). Emergence in Cyber-Physical Systems-of-Systems (CPSoSs). In Cyber-Physical Systems of Systems (pp. 73–96). Springer International Publishing. https://doi.org/10.1007/978-3-319-47590-5_3
- Interfaces in Evolving Cyber-Physical Systems-of-Systems / Frömel, B., & Kopetz, H. (2016). Interfaces in Evolving Cyber-Physical Systems-of-Systems. In Cyber-Physical Systems of Systems (pp. 40–72). Springer International Publishing. https://doi.org/10.1007/978-3-319-47590-5_2
- Cyber-Physical Systems of Systems / Bondavalli, A., Bouchenak, S., & Kopetz, H. (Eds.). (2016). Cyber-Physical Systems of Systems. Springer International Publishing. https://doi.org/10.1007/978-3-319-47590-5
2015
- From Embedded Systems to System of Systems / Kopetz, H. (2015). From Embedded Systems to System of Systems. ITASC Workshop: Intelligent Transportation and Smart City, Shanghai, Non-EU. http://hdl.handle.net/20.500.12708/86183
- Direct versus stigmergic information flow in systems-of-systems / Kopetz, H., Frömel, B., & Höftberger, O. (2015). Direct versus stigmergic information flow in systems-of-systems. In 2015 10th System of Systems Engineering Conference (SoSE). 10th Annual Systems of Systems Engineering Conference 2015, San Antonio, TX, USA, Non-EU. https://doi.org/10.1109/sysose.2015.7151963
- Simplification Principles in the Design of Cyber-Physical System-of-Systems / Kopetz, H. (2015). Simplification Principles in the Design of Cyber-Physical System-of-Systems. In Complex Systems Design & Management (pp. 39–51). Springer International Publishing. https://doi.org/10.1007/978-3-319-26109-6_3
- Towards an understanding of emergence in systems-of-systems / Kopetz, H., Höftberger, O., Frömel, B., Brancati, F., & Bondavalli, A. (2015). Towards an understanding of emergence in systems-of-systems. In 2015 10th System of Systems Engineering Conference (SoSE). 10th Annual Systems of Systems Engineering Conference 2015, San Antonio, TX, USA, Non-EU. https://doi.org/10.1109/sysose.2015.7151925
2014
- Keynote: From embedded systems to systems of systems / Kopetz, H. (2014). Keynote: From embedded systems to systems of systems. In 2014 IEEE 17th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (pp. 292–292). IEEE. https://doi.org/10.1109/isorc.2014.58
- Why a Global Time is Needed in a Dependable SoS / Kopetz, H. (2014). Why a Global Time is Needed in a Dependable SoS. Engineering Dependable Systems of Systems (EDSoS) 2014, Newcastle upon Tyne, United Kingdom, EU. http://hdl.handle.net/20.500.12708/85920
- From Embedded Systems to Systems of Systems / Kopetz, H. (2014). From Embedded Systems to Systems of Systems. 27th International Conference on VLSI Design 2014, Mumbai, India, Non-EU. http://hdl.handle.net/20.500.12708/85921
- Systems of Systems Need a Global Time / Kopetz, H. (2014). Systems of Systems Need a Global Time. 23rd NIST-ATIS Synchronization Workshop, San Jose, California, USA, Non-EU. http://hdl.handle.net/20.500.12708/85918
- Towards synchronous deterministic channels for the Internet of Things / Steiner, W., Bonomi, F., & Kopetz, H. (2014). Towards synchronous deterministic channels for the Internet of Things. In Proc. of the IEEE World Forum on Internet of Things 2014 (WF-IoT2014) (pp. 433–436). IEEE. http://hdl.handle.net/20.500.12708/55750
- A Conceptual Model for the Information Transfer in System of Systems / Kopetz, H. (2014). A Conceptual Model for the Information Transfer in System of Systems. In Proc. of the 17th IEEE International Symposium on Object/Component-Oriented Real-Time Distributed Computing (pp. 17–24). http://hdl.handle.net/20.500.12708/55746
2011
- Roll-Forward Recovery with State Estimation / Mikolasek, V., & Kopetz, H. (2011). Roll-Forward Recovery with State Estimation. In 14th IEEE International Symposium on Object/Component/Service-oriented Real-time Distributed Computing (ISORC) (pp. 179–186). IEEE. http://hdl.handle.net/20.500.12708/53910
- Authentication in Time-Triggered Systems using Time-delayed Release of Keys / Wasicek, A., El Salloum, C., & Kopetz, H. (2011). Authentication in Time-Triggered Systems using Time-delayed Release of Keys. In 14th IEEE International Symposium on Object/Component/Service-oriented Real-time Distributed Computing (ISORC) (pp. 31–39). IEEE. http://hdl.handle.net/20.500.12708/53909
2010
- A System-on-a-Chip Platform for Mixed-Criticality Applications / Wasicek, A., Kopetz, H., & El Salloum, C. (2010). A System-on-a-Chip Platform for Mixed-Criticality Applications. In 2010 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing. Proceedings of 13th IEEE International Symposium on Object/component/service-oriented Real-time distributed computing (ISORC’10), Carmona, Seville, Spain, EU. IEEE. https://doi.org/10.1109/isorc.2010.43
2009
- From a Federated to an Integrated Automotive Architecture / Obermaisser, R., El Salloum, C., Huber, B., & Kopetz, H. (2009). From a Federated to an Integrated Automotive Architecture. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (pp. 956–965). IEEE. https://doi.org/10.1109/tcad.2009.2014005
- Fundamental Design Principles for Embedded Systems: The Architectural Style of the Cross-Domain Architecture GENESYS / Obermaisser, R., Salloum, C. E., Huber, B., & Kopetz, H. (2009). Fundamental Design Principles for Embedded Systems: The Architectural Style of the Cross-Domain Architecture GENESYS. In 2009 IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing. IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Newport Beach, CA, USA, Austria. IEEE. https://doi.org/10.1109/isorc.2009.12
- GENESYS (GENeric Embedded SYStem) - A Candidate for an ARTEMIS Cross-Domain Reference Architecture for Embedded Systems / Obermaisser, R., Kopetz, H., & Kuster, S. (2009). GENESYS (GENeric Embedded SYStem) - A Candidate for an ARTEMIS Cross-Domain Reference Architecture for Embedded Systems. ARTEMIS Magazine, 5, 32–34. http://hdl.handle.net/20.500.12708/166246
- Fault Isolation with Intermediate Checks of End-to-end Checksums in the Time-Triggered System-on-Chip Architecture / Paulitsch, H., Paukovits, C., El Salloum, C., & Kopetz, H. (2009). Fault Isolation with Intermediate Checks of End-to-end Checksums in the Time-Triggered System-on-Chip Architecture. DSNOC’09 (DATE Friday Workshop), Nice, France, EU. http://hdl.handle.net/20.500.12708/84901
2008
- Composability in the time-triggered system-on-chip architecture / Kopetz, H. (2008). Composability in the time-triggered system-on-chip architecture. In Proceedings of the 21st Annual IEEE International SoC Conference (pp. 87–90). http://hdl.handle.net/20.500.12708/52648
- The time-triggered System-on-a-Chip architecture / Obermaisser, R., Salloum, C. E., Huber, B., & Kopetz, H. (2008). The time-triggered System-on-a-Chip architecture. In 2008 IEEE International Symposium on Industrial Electronics. IEEE International Symposium on Industrial Electronics, 2008. ISIE 2008, Cambridge, UK, EU. https://doi.org/10.1109/isie.2008.4677135
- A Novel Naming Scheme for System-on-a-Chips Supporting Dynamic Resource Management / Salloum, C. E., Obermaisser, R., Huber, B., & Kopetz, H. (2008). A Novel Naming Scheme for System-on-a-Chips Supporting Dynamic Resource Management. In 2008 Seventh European Dependable Computing Conference. Seventh European Dependable Computing Conference (EDCC-7), Kaunas, Lithuania, EU. IEEE Computer Society. https://doi.org/10.1109/edcc-7.2008.21
- Concepts of Switching in the Time-Triggered Network-on-Chip / Paukovits, C., & Kopetz, H. (2008). Concepts of Switching in the Time-Triggered Network-on-Chip. In 2008 14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications. 14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2008), Kaohsiung, Taiwan, Non-EU. IEEE Computer Society. https://doi.org/10.1109/rtcsa.2008.18
- Wrong Assumptions and Neglected Areas in Embedded Systems Research / Kopetz, H. (2008). Wrong Assumptions and Neglected Areas in Embedded Systems Research. In 2008 11th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC). The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, Orlando, Florida, USA, Non-EU. IEEE Computer Society. https://doi.org/10.1109/isorc.2008.15
- The Complexity Challenge in Embedded System Design / Kopetz, H. (2008). The Complexity Challenge in Embedded System Design. In 2008 11th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC). The 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, Orlando, Florida, USA, Non-EU. IEEE Computer Society. https://doi.org/10.1109/isorc.2008.14
2007
- A Diagnostic Unit for the time-triggered System-on-a-Chip architecture / Paulitsch, H., Obermaisser, R., El Salloum, C., Huber, B., & Kopetz, H. (2007). A Diagnostic Unit for the time-triggered System-on-a-Chip architecture. In Workshop Digest, Diagnostic Services in Network-on-Chips (p. 2). DATE’07. http://hdl.handle.net/20.500.12708/51902
- A time-triggered system-on-a-chip architecture with integrated support for diagnosis / El Salloum, C., Obermaisser, R., Huber, B., Paulitsch, H., & Kopetz, H. (2007). A time-triggered system-on-a-chip architecture with integrated support for diagnosis. In Workshop Digest, Diagnostic Services in Network-on-Chips (p. 2). DATE’07. http://hdl.handle.net/20.500.12708/51901
- Automotive Software Development for a Multi-Core System-on-a-Chip / Kopetz, H., Obermaisser, R., El Salloum, C., & Huber, B. (2007). Automotive Software Development for a Multi-Core System-on-a-Chip. In Fourth International Workshop on Software Engineering for Automotive Systems (SEAS ’07), Proceedings. SEAS’07, Minneapolis, USA, Non-EU. IEEE. https://doi.org/10.1109/SEAS.2007.2
- Zuverlässige Elektronik-Systeme im Verkehrswesen / Kopetz, H. (2007). Zuverlässige Elektronik-Systeme im Verkehrswesen. In Informatik bewegt - Informationstechnik in Verkehr und Logistik (pp. 55–79). acatech. http://hdl.handle.net/20.500.12708/52112
- Error Containment in the Time-Triggered System-On-a-Chip Architecture / Obermaisser, R., Kopetz, H., El Salloum, C., & Huber, B. (2007). Error Containment in the Time-Triggered System-On-a-Chip Architecture. In IFIP – The International Federation for Information Processing (pp. 339–352). Springer Boston. https://doi.org/10.1007/978-0-387-72258-0_29
- Modeling of Software-Hardware Complexes / Kopetz, H. (2007). Modeling of Software-Hardware Complexes. In IFIP – The International Federation for Information Processing (pp. 431–432). Springer Boston. https://doi.org/10.1007/978-0-387-72258-0_39
- Time-Triggered Ethernet and IEEE 1588 Clock Synchronization / Ademaj, A., & Kopetz, H. (2007). Time-Triggered Ethernet and IEEE 1588 Clock Synchronization. In ISPCS 2007 Proceedings (p. 3). http://hdl.handle.net/20.500.12708/51883
- Why do we need a Sparse Global Time-Base in Dependable Real-time Systems? / Kopetz, H. (2007). Why do we need a Sparse Global Time-Base in Dependable Real-time Systems? In ISPCS Proceedings (p. 5). http://hdl.handle.net/20.500.12708/51882
- Tolerating Arbitrary Failures in a Master-Slave Clock-Rate Correction Mechanism for Time-Triggered Fault-Tolerant Distributed Systems with Atomic Broadcast / Ademaj, A., Hanzlik, A., & Kopetz, H. (2007). Tolerating Arbitrary Failures in a Master-Slave Clock-Rate Correction Mechanism for Time-Triggered Fault-Tolerant Distributed Systems with Atomic Broadcast. In Proceedings of the 15th International Conference on Real-Time and Network Systems (RTNS’07) (pp. 215–224). Institut National Polytechnique de Lorraine. http://hdl.handle.net/20.500.12708/51845
2006
- Combination of clock-state and clock-rate correction in fault-tolerant distributed systems / Kopetz, H., Ademaj, A., & Hanzlik, A. (2006). Combination of clock-state and clock-rate correction in fault-tolerant distributed systems. Real-Time Systems, 33, 139–173. http://hdl.handle.net/20.500.12708/173417
- Supporting Heterogeneous Applications in the DECOS Integrated Architecture / El Salloum, C., Obermaisser, R., Huber, B., Kopetz, H., & Suri, N. (2006). Supporting Heterogeneous Applications in the DECOS Integrated Architecture. In International DECOS Workshop. International DECOS Workshop, Vienna, Austria, Austria. http://hdl.handle.net/20.500.12708/51440
- Software Implementation of Time-Triggered Ethernet Controller / Grillinger, P., Ademaj, A., Steinhammer, K., & Kopetz, H. (2006). Software Implementation of Time-Triggered Ethernet Controller. In Workshop on Factory Communication Systems - WFCS 2006, Proceedings (pp. 145–150). http://hdl.handle.net/20.500.12708/51599
- Time-Triggered Ethernet / Steinhammer, K., & Kopetz, H. (2006). Time-Triggered Ethernet. In Junior Scientist Conference - JSC 2006 (pp. 73–74). http://hdl.handle.net/20.500.12708/51598
- The Startup Problem in Fault-Tolerant Time-Triggered Communication / Steiner, W., & Kopetz, H. (2006). The Startup Problem in Fault-Tolerant Time-Triggered Communication. In International Conference on Dependable Systems and Networks 2006, Proceedings of the (pp. 35–44). http://hdl.handle.net/20.500.12708/51430
- A Time-Triggered Ethernet (TTE) Switch / Steinhammer, K., Grillinger, P., Ademaj, A., & Kopetz, H. (2006). A Time-Triggered Ethernet (TTE) Switch. In Proceedings of the Design, Automation and Test in Europe (p. 6). http://hdl.handle.net/20.500.12708/51356
- Pulsed Data Streams / Kopetz, H. (2006). Pulsed Data Streams. In B. Kleinjohann, L. Kleinjohann, R. J. Machado, C. Pereira, & P. S. Thiagarajan (Eds.), 5th IFIP Working Conference on Distributed and Parallel Embedded Systems, Proceedings (pp. 105–114). Springer. http://hdl.handle.net/20.500.12708/51770
- Design Comprehension of Time-Triggered Real-Time Systems / Rumpler, B., & Kopetz, H. (2006). Design Comprehension of Time-Triggered Real-Time Systems. In Proceedings of the Junior Scientist Conference 2006 (JSC’06) (pp. 63–64). http://hdl.handle.net/20.500.12708/51492
- Fault-Tolerant Time-Triggered Ethernet Configuration with Star Topology / Ademaj, A., Steinhammer, K., Grillinger, P., Kopetz, H., & Hanzlik, A. (2006). Fault-Tolerant Time-Triggered Ethernet Configuration with Star Topology. In 19th International Conference on Architecture of Computing systems (ARCS’06), Proceedings of the. 19th International Conference on Architecture of Computing systems (ARCS), Frankfurt/Main, Germany, EU. Springer-Verlag. http://hdl.handle.net/20.500.12708/51432
2005
- Time Triggered Communication Networks / Kopetz, H., & Bauer, G. (2005). Time Triggered Communication Networks. In Industrial Information Technology Handbook. CRC Press. http://hdl.handle.net/20.500.12708/25345
- Dependable Time-Triggered Communication / Kopetz, H., Bauer, G., & Steiner, W. (2005). Dependable Time-Triggered Communication. In The Industrial Communication Technology Handbook. CRC Press. http://hdl.handle.net/20.500.12708/25348
- A Maintenance-Oriented Fault Model for the DECOS Integrated Diagnostic Architecture / Peti, P., Obermaisser, R., Ademaj, A., & Kopetz, H. (2005). A Maintenance-Oriented Fault Model for the DECOS Integrated Diagnostic Architecture. In Proceedings of the 13th Workshop on Parallel and Distributed Real-Time Systems 2005 (WPDRTS) Author(s). Workshop on Parallel and Distributed Real-Time Systems (WPDRTS), Orlando, Florida, USA, Austria. http://hdl.handle.net/20.500.12708/51000
- Virtual Gateways in the DECOS Integrated Architecture / Obermaisser, R., Peti, P., & Kopetz, H. (2005). Virtual Gateways in the DECOS Integrated Architecture. In Proceedings of the 13th Workshop on Parallel and Distributed Real-Time Systems 2005 (WPDRTS). Workshop on Parallel and Distributed Real-Time Systems (WPDRTS), Orlando, Florida, USA, Austria. http://hdl.handle.net/20.500.12708/50999
- Out-of-Norm Assertions / Peti, P., Obermaisser, R., & Kopetz, H. (2005). Out-of-Norm Assertions. In Proceedings of the elventh IEEE Real-Time and Embedded Technology and Applications Symposium (pp. 280–291). IEEE Computer Society. http://hdl.handle.net/20.500.12708/50998
- Integration of two Complementary Time-Triggered Technologies: TMO and TTP / Obermaisser, R., Henrich, E., Kim, K., Kopetz, H., & Kim, M. H. (2005). Integration of two Complementary Time-Triggered Technologies: TMO and TTP. In Proceedings of the International Embedded Systems Symposium 2005 (pp. 1–12). Springer. http://hdl.handle.net/20.500.12708/51079
- Virtual Networks in an Integrated Time-Triggered Architecture / Obermaisser, R., Peti, P., & Kopetz, H. (2005). Virtual Networks in an Integrated Time-Triggered Architecture. In Proceedings of the 10th IEEE International Workshop on Object-Oriented Real-Time Dependable Systems, 2005. IEEE International Workshop on Object-Oriented Real-Time Dependable Systems (WORDS), Sedona, Arizona, Austria. http://hdl.handle.net/20.500.12708/51080
- Dependable Embedded Systems Research at TU Vienna / Kopetz, H., Obermaisser, R., & Schmid, U. (2005). Dependable Embedded Systems Research at TU Vienna. Elektrotechnik Und Informationstechnik : E & i, 122(1), 33–37. https://doi.org/10.1007/BF03054020
- TTA Supported Service Availability / Kopetz, H. (2005). TTA Supported Service Availability. In M. Malek, E. Nett, & N. Suri (Eds.), Service Availability - Second International Availability Symposium (pp. 1–14). Springer. http://hdl.handle.net/20.500.12708/51769
- DECOS-TADE Collaboration / Kim, K., Recker, W., Tsai, W. T., Kopetz, H., & Puschner, P. (2005). DECOS-TADE Collaboration. In IST-NSF Workshop on Transatlantic Research Agenda on Future Challenges in Embedded Systems Design (p. 7). Information Society Technologies/National Science Foundation. http://hdl.handle.net/20.500.12708/51114
- The Time-Triggered Ethernet (TTE) Design / Kopetz, H., Ademaj, A., Grillinger, P., & Steinhammer, K. (2005). The Time-Triggered Ethernet (TTE) Design. In Proceedings of the 8th IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC) (pp. 22–33). IEEE Computer Society. http://hdl.handle.net/20.500.12708/51016
- Antrag UNI-Infrastruktur III, Embedded Systems Research Cluster / Schmid, U., Kopetz, H., Puschner, P., Mayerhofer, L., Steininger, A., Grünbacher, H., Kastner, W., & Krall, A. (2005). Antrag UNI-Infrastruktur III, Embedded Systems Research Cluster. http://hdl.handle.net/20.500.12708/33035
2004
- The Time-Triggered Architecture: Short Summary of Recent Work and Future Trends / Kopetz, H., Bauer, G., Obermaisser, R., Peti, P., & Puschner, P. (2004). The Time-Triggered Architecture: Short Summary of Recent Work and Future Trends. http://hdl.handle.net/20.500.12708/32970
- On the Fault Hypothesis for a Safety-Critical Real-Time System / Kopetz, H. (2004). On the Fault Hypothesis for a Safety-Critical Real-Time System. In H. Kopetz (Ed.), On the Fault Hypothesis for a Safety-Critical Real-Time System. http://hdl.handle.net/20.500.12708/51359
2002
- Initial Demonstration of Smart Sensor Case Study / Elmenreich, W., Haidinger, W., Kopetz, H., Losert, T., Obermaisser, R., Paulitsch, M., & Trödhandl, C. (2002). Initial Demonstration of Smart Sensor Case Study. http://hdl.handle.net/20.500.12708/32826
- Smart Transducers Interface Specification / Aslam-Mir, S., Haidinger, W., Elmenreich, W., Losert, T., & Kopetz, H. (2002). Smart Transducers Interface Specification. http://hdl.handle.net/20.500.12708/32857
- Temporal composability / Kopetz, H., & Obermaisser, R. (2002). Temporal composability. http://hdl.handle.net/20.500.12708/32843
- Byzantine Fault Containment in TTP/C / Bauer, G., Kopetz, H., & Steiner, W. (2002). Byzantine Fault Containment in TTP/C. http://hdl.handle.net/20.500.12708/32844
- Time-Triggered Real-Time Computing / Kopetz, H. (2002). Time-Triggered Real-Time Computing. http://hdl.handle.net/20.500.12708/32835
- On the Specification of Linking Interfaces in Distributed Real-Time Systems / Kopetz, H. (2002). On the Specification of Linking Interfaces in Distributed Real-Time Systems. http://hdl.handle.net/20.500.12708/32827
2001
- A Universal Smart Transducer Interface: TTP/A / Kopetz, H., Holzmann, M., & Elmenreich, W. (2001). A Universal Smart Transducer Interface: TTP/A. Computer Systems Science and Engineering, 16(2), 71–77. http://hdl.handle.net/20.500.12708/174788
- Interface Design for Smart Transducers / Elmenreich, W., Haidinger, W., & Kopetz, H. (2001). Interface Design for Smart Transducers. In Proceedings of the IEEE Instrumentation and Measurement Technology Conference (IMTC) (pp. 1642–1647). http://hdl.handle.net/20.500.12708/50880
- Tolerating Arbitrary Node Failures in the Time-Triggered Architecture / Kopetz, H., Bauer, G., & Poledna, S. (2001). Tolerating Arbitrary Node Failures in the Time-Triggered Architecture. In Proceedings of the SAE 2001 World Congress. SAE World Congress, Detroit, MI, USA, Austria. http://hdl.handle.net/20.500.12708/50884
- Assumption Coverage under Different Failure Modes in the Time-Triggered Architecture / Bauer, G., Kopetz, H., & Puschner, P. (2001). Assumption Coverage under Different Failure Modes in the Time-Triggered Architecture. In Proceedings of the 8th IEEE International Conference on Emerging Technologies and Factory Automation (pp. 333–341). http://hdl.handle.net/20.500.12708/50882
- The Three Interfaces of a Smart Transducer / Kopetz, H. (2001). The Three Interfaces of a Smart Transducer. In Proceedings of the FeT`2001 - 4th IFAC International Conference on Fieldbus Systems and their Applications. IFAC International Conference on Fieldbus Systems and their Applications, Nancy, France, Austria. http://hdl.handle.net/20.500.12708/50877
- A Universal Smart Transducer Interface / Kopetz, H. (2001). A Universal Smart Transducer Interface. In Proceedings of the V Simpósio Brasileiro de Automação Inteligente (pp. 1–8). http://hdl.handle.net/20.500.12708/50876
- The Temporal Specification of Interfaces in Distributed Real-Time Systems / Kopetz, H. (2001). The Temporal Specification of Interfaces in Distributed Real-Time Systems. In Proceedings of the EMSOFT (pp. 223–236). http://hdl.handle.net/20.500.12708/50869
2000
- Composability in the Time-Triggered Architecture / Kopetz, H. (2000). Composability in the Time-Triggered Architecture. In Proceedings of the SAE International Congress and Exhibition (2000-01-1382). SAE International Congress and Exhibition, Detroit, USA, Austria. http://hdl.handle.net/20.500.12708/50899
- Transparent Redundancy in the Time-Triggered Architecture / Bauer, G., & Kopetz, H. (2000). Transparent Redundancy in the Time-Triggered Architecture. In Proceedings of the International Conference on Communications in Computing. International Conference on Communications in Computing, Las Vegas, USA, Austria. http://hdl.handle.net/20.500.12708/50898
- Software Engineering for Real-Time: A Roadmap / Kopetz, H. (2000). Software Engineering for Real-Time: A Roadmap. In Proceedings of the 22nd International conference on Future of Software Engineering (FoSE). International Conference on Future of Software Engineering, Limerick, Ireland, Austria. http://hdl.handle.net/20.500.12708/50896
- A Centralized Approach for Avoiding the Babbling-Idiot Failure in the time-Triggered Architecture / Bauer, G., Frenning, T., Jonsson, A.-K., Kopetz, H., & Temple, C. (2000). A Centralized Approach for Avoiding the Babbling-Idiot Failure in the time-Triggered Architecture. In Proceedings of the ICDSN 2000. ICDSN, New York, USA, Austria. http://hdl.handle.net/20.500.12708/50895
- A Comparison of LIN and TTP/A / Kopetz, H., Elmenreich, W., & Mack, C. (2000). A Comparison of LIN and TTP/A. In Proceedings of the 3rd IEEE International Workshop on Factory Communication Systems (WFCS 2000) (pp. 99–107). http://hdl.handle.net/20.500.12708/50894
- A Universal Smart Transducer Interface: TTP/A / Kopetz, H., Holzmann, M., & Elmenreich, W. (2000). A Universal Smart Transducer Interface: TTP/A. In Proceedings of the third IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC 2000). IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Newport Beach, CA, USA, Austria. http://hdl.handle.net/20.500.12708/50867
Supervisions
2015
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Knowledge-based dynamic reconfiguration for embedded real-time systems
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Höftberger, O. (2015). Knowledge-based dynamic reconfiguration for embedded real-time systems [Dissertation, Technische Universität Wien]. reposiTUm. https://doi.org/10.34726/hss.2015.31540
Download: PDF (2.85 MB)
2011
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Performance evaluation and optimization of standard-ethernet traffic in TTEthernet systems
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Suethanuwong, E. (2011). Performance evaluation and optimization of standard-ethernet traffic in TTEthernet systems [Dissertation, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-60071
Download: PDF (3.21 MB) -
Executable time-triggered model (E-TTM) for the development of safety-critical embedded systems
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Perez Cerrolaza, J. M. (2011). Executable time-triggered model (E-TTM) for the development of safety-critical embedded systems [Dissertation, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-44622
Download: PDF (1.88 MB) -
Validation middleware for mixed criticality networks
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Mair, T. (2011). Validation middleware for mixed criticality networks [Diploma Thesis, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-45471
Download: PDF (2.79 MB) - Security in Time-Triggered Systems / Wasicek, A. R. (2011). Security in Time-Triggered Systems [Dissertation, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/161503
2008
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Reliability assessment of DECOS System-on-a-Chip components
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Kraut, H. (2008). Reliability assessment of DECOS System-on-a-Chip components [Master Thesis, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-22923
Download: PDF (5.73 MB) -
A resource management scheme for the TT-SoC architecture
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Weirich, B. (2008). A resource management scheme for the TT-SoC architecture [Diploma Thesis, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-28745
Download: PDF (2.9 MB) -
Design comprehension of embedded real-time systems
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Rumpler, B. (2008). Design comprehension of embedded real-time systems [Dissertation, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-26639
Download: PDF (1.28 MB) -
The time-triggered system-on-chip architecture
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Paukovits, C. P. (2008). The time-triggered system-on-chip architecture [Dissertation, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-22787
Download: PDF (1.33 MB) -
Validation of the DECOS encapsulated execution environment
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Strnad, T. (2008). Validation of the DECOS encapsulated execution environment [Diploma Thesis, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-28387
Download: PDF (2.67 MB) -
Resource management in an integrated time-triggered architecture
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Huber, B. (2008). Resource management in an integrated time-triggered architecture [Dissertation, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-15983
Download: PDF (4.33 MB)
2007
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Diagnosis of CAN-based legacy applications in the time-triggered architecture
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Schüller, F. (2007). Diagnosis of CAN-based legacy applications in the time-triggered architecture [Diploma Thesis, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-19980
Download: PDF (2.46 MB) -
Interface design in the time-triggered system-on-chip architecture
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El-Salloum, C. (2007). Interface design in the time-triggered system-on-chip architecture [Dissertation, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-18578
Download: PDF (2.2 MB) -
Secure internet interfaces for an integrated time-triggered architecture
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Schrei, A. (2007). Secure internet interfaces for an integrated time-triggered architecture [Diploma Thesis, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-19689
Download: PDF (3.88 MB) -
An extensible interface subsystem for a novel time-triggered system-on-a-chip architecture
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Seiger, R. (2007). An extensible interface subsystem for a novel time-triggered system-on-a-chip architecture [Master Thesis, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-18929
Download: PDF (1.47 MB) -
Interface design for hardware-in-the-loop simulation of real-time systems
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Schlager, M. (2007). Interface design for hardware-in-the-loop simulation of real-time systems [Dissertation, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-17824
Download: PDF (7.36 MB) -
A framework for validation of virtual gateways in the DECOS architecture
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Pucher, C. (2007). A framework for validation of virtual gateways in the DECOS architecture [Diploma Thesis, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-22245
Download: PDF (1.76 MB) - Time-triggered network-on-a-chip / Engleder, G. A. (2007). Time-triggered network-on-a-chip [Master Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/184146
- Experimental evaluation of temporal and spatial partitioning for gateways in integrated architectures / Hofer, B. (2007). Experimental evaluation of temporal and spatial partitioning for gateways in integrated architectures [Diploma Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/181913
2006
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Applying model-integrated computing on time-triggered application development
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Paukovits, C. (2006). Applying model-integrated computing on time-triggered application development [Master Thesis, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-37276
Download: PDF (1.01 MB) - Gateway generation for virtual networks in the DECOS integrated architecture / Höller, M. (2006). Gateway generation for virtual networks in the DECOS integrated architecture [Diploma Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/185041
- Design of an FPGA-based time-triggered Ethernet system / Steinhammer, K. (2006). Design of an FPGA-based time-triggered Ethernet system [Dissertation, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/181350
- Scheduling for the Time-Triggered Ethernet / Brandstetter, A. (2006). Scheduling for the Time-Triggered Ethernet [Diploma Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/181326
- Extended confidence-weighted averaging in sensor fusion / Schörgendorfer, A. (2006). Extended confidence-weighted averaging in sensor fusion [Master Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/179560
- A partitioning operating system based on RTAI-LXRT Linux / Leiner, B. M. J. (2006). A partitioning operating system based on RTAI-LXRT Linux [Master Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/178061
2005
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Diagnosis and maintenance in an integrated time-triggered architecture
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Peti, P. (2005). Diagnosis and maintenance in an integrated time-triggered architecture [Dissertation, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-17847
Download: PDF (3.7 MB) - Integrating CAN-based legacy applications in the TTA / Riezler, D. (2005). Integrating CAN-based legacy applications in the TTA [Master Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/179992
- Fault injection for diagnosis and maintenance in the time-triggered architecture / Paulitsch, H. (2005). Fault injection for diagnosis and maintenance in the time-triggered architecture [Diploma Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/179892
- Extending CORBA for hard real-time systems / Losert, T. (2005). Extending CORBA for hard real-time systems [Dissertation, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/177709
2004
- Wireless real-time communication for smart transducer networks / Huber, B. (2004). Wireless real-time communication for smart transducer networks [Diploma Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/177967
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Investigation of fault-tolerant multi-cluster clock synchronization strategies by means of simulation
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Hanzlik, A. (2004). Investigation of fault-tolerant multi-cluster clock synchronization strategies by means of simulation [Dissertation, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-9301
Download: PDF (5.18 MB) - Startup and recovery of fault-tolerant time-triggered communication / Steiner, W. (2004). Startup and recovery of fault-tolerant time-triggered communication [Dissertation, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/184535
- TCP für die time-triggered architecture / Benesch, R. (2004). TCP für die time-triggered architecture [Diploma Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/179288
2003
- Assessment of error detection mechanisms of the time-triggered architecture using fault injection / Ademaj, A. (2003). Assessment of error detection mechanisms of the time-triggered architecture using fault injection [Dissertation, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/183025
- An integrated architecture for event-triggered and time-triggered control paradigms / Obermaisser, R. (2003). An integrated architecture for event-triggered and time-triggered control paradigms [Dissertation, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/182872
- Design of a gateway for the interconnection of real-time communication hierarchies / Borovicka, M. C. A. V. (2003). Design of a gateway for the interconnection of real-time communication hierarchies [Diploma Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/181518
2002
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Sensor fusion in time-triggered systems
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Elmenreich, W. (2002). Sensor fusion in time-triggered systems [Dissertation, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-11148
Download: PDF (2.06 MB) -
Fault-tolerant clock synchronization for embedded distributed multi-cluster systems
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Paulitsch, M. (2002). Fault-tolerant clock synchronization for embedded distributed multi-cluster systems [Dissertation, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-13587
Download: PDF (893 KB) - Architectural requirements for TTP/A nodes / Trödhandl, C. (2002). Architectural requirements for TTP/A nodes [Diploma Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/186248
- Description mechanisms supporting the configuration and management of TTP/A fieldbus systems / Pitzek, S. (2002). Description mechanisms supporting the configuration and management of TTP/A fieldbus systems [Diploma Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/185227
- Designing a high-performant real-time architecture based on COTS-components / Eder, C. (2002). Designing a high-performant real-time architecture based on COTS-components [Diploma Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/185223
- Implementation of a TTP/C cluster based on commercial gigabit ethernet components / Schwarz, M. (2002). Implementation of a TTP/C cluster based on commercial gigabit ethernet components [Diploma Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/178841
1993
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Realisierung eines Network Management & Signalling System für das Prototyp einer Weltraumkommunikationseinrichtung (OBIF)
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Kamali, M. M. (1993). Realisierung eines Network Management & Signalling System für das Prototyp einer Weltraumkommunikationseinrichtung (OBIF) [Diploma Thesis, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-12026
Download: PDF (7.11 MB)
Awards
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Wilhelm Exner Medaillie
2005 / Austria -
Vorsitzender d. Wiss. Beirat ACR
2004 / Austria -
IEEE Technical Achievement Award
2004 -
IGM-Preis
2001 / Austria -
Mitglied "Rat for Forschung und Technologieentwicklung"
2000 / Austria -
Wirkliches Mitglied der Österr. Akademie der Wissenschaften
1998 / Mitgliedschaft / Austria -
Chairman der IFIP WG 10.4
1996 -
Goldenes Verdienstkreuz der Republik Österreich
1995 / Ehrenkreuz für Wissenschaft und Kunst / Austria -
Fellow of the IEEE
1993 -
Ruf als Direktor an das Max-Plank Institut
1993 / Germany -
Gründungsmitglied der IFIP 10.4 WG on Dependable Computing
1980 -
Gründungsmitglied der Österr. Computer Gesellschaft
1975 / Austria
And more…
Soon, this page will include additional information such as reference projects, activities as journal reviewer and editor, memberships in councils and committees, and other research activities.
Until then, please visit Hermann Kopetz’s research profile in TISS .