TU Wien Informatics

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Andreas Krall

Ao.Univ.Prof. Dipl.-Ing. Dr.techn.

Research Focus

  • Computer Engineering: 40%
  • Information Systems Engineering: 30%
  • Logic and Computation: 30%

Research Areas

  • computer architecture, interpreter, programing languages, compiler
Andreas Krall

About

1) Compiler2) Compiler verification3) Virtual machines4) Computer architecture

Roles

  • Associate Professor
    Compilers and Languages, E194-05
  • Curriculum Coordinator
    Bachelor Informatics
  • Curriculum Coordinator
    Bachelor Software and Information Engineering
  • Curriculum Commission for Informatics
    Substitute Member

Contact

2024W

2025S

 

2024

  • The Vienna Architecture Description Language / Himmelbauer, S., Hochrainer, C., Huber, B. L., Mischkulnig, N., Paulweber, P., Schwarzinger, T., & Krall, A. (2024). The Vienna Architecture Description Language. arXiv. https://doi.org/10.34726/5619
    Download: PDF (1.01 MB)

2023

2022

  • Instruction Code Selection / Ebner, D., Krall, A., & Scholz, B. (2022). Instruction Code Selection. In F. Rastello & F. Bouchez Tichadou (Eds.), SSA-based Compiler Design (pp. 257–268). Springer. https://doi.org/10.1007/978-3-030-80515-9_19

2018

  • Fast and flexible instruction selection with constraints / Thier, P., Ertl, M. A., & Krall, A. (2018). Fast and flexible instruction selection with constraints. In Proceedings of the 27th International Conference on Compiler Construction. Compiler Construction, Wien, Austria. ACM. https://doi.org/10.1145/3178372.3179501

2016

  • Vectorization in PyPy's Tracing Just-In-Time Compiler / Plangger, R., & Krall, A. (2016). Vectorization in PyPy’s Tracing Just-In-Time Compiler. In Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems. SCOPES 2016 - 19th International Workshop on Software and Compilers for Embedded Systems, St. Goar, Germany. https://doi.org/10.1145/2906363.2906384

2015

  • vanHelsing: A Fast Proof Checker for Debuggable Compiler Verification / Lezuo, R., Dragan, I., Barany, G., & Krall, A. (2015). vanHelsing: A Fast Proof Checker for Debuggable Compiler Verification. In L. Kovacs & D. Zaharie (Eds.), 2015 17th International Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC). https://doi.org/10.1109/synasc.2015.34
  • PyPy's Number Crunching Optimization / Plangger, R., & Krall, A. (2015). PyPy’s Number Crunching Optimization. In Programmiersprachen und Grundlagen der Programmierung (pp. 448–462). Schriftenreihe des Instituts für Computersprachen, TU Wien. http://hdl.handle.net/20.500.12708/56436

2014

  • CASM / Lezuo, R., Paulweber, P., & Krall, A. (2014). CASM. In Proceedings of the 2014 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems - LCTES ’14. LCTES ’14: 2014 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems, Edinburgh, UK, EU. https://doi.org/10.1145/2597809.2597813
  • Correct Compilers for Correct Processors / Krall, A. (2014). Correct Compilers for Correct Processors. HiPEAC 2014 (International Conference on High-Performance and Embedded Architectures and Compilers), Vienna, Austria. http://hdl.handle.net/20.500.12708/86025
  • Integrated modulo scheduling and cluster assignment for TI TMS320C64x+ architecture / Kim, N., & Krall, A. (2014). Integrated modulo scheduling and cluster assignment for TI TMS320C64x+ architecture. In Proceedings of the 11th Workshop on Optimizations for DSP and Embedded Systems - ODES ’14. ODES-11: 11th Workshop on Optimizations for DSP and Embedded Systems, Orlando, USA, Non-EU. https://doi.org/10.1145/2568326.2568327

2013

  • Optimal and Heuristic Global Code Motion for Minimal Spilling / Barany, G., & Krall, A. (2013). Optimal and Heuristic Global Code Motion for Minimal Spilling. In Compiler Construction 22nd International Conference, CC 2013, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2013, Rome, Italy, March 16-24, 2013, Proceedings (pp. 21–40). Lecture Notes in Computer Science. https://doi.org/10.1007/978-3-642-37051-9_2
  • Software De-Pipelining for Nested Loops / Bermudo, N., Krall, A., Su, B., & Wang, J. (2013). Software De-Pipelining for Nested Loops. International Journal of Computer Science and Electronics Engineering, 1(1), 6. http://hdl.handle.net/20.500.12708/157927
  • IR-level versus machine-level if-conversion for predicated architectures / Jordan, A., Kim, N., & Krall, A. (2013). IR-level versus machine-level if-conversion for predicated architectures. In Proceedings of the 10th Workshop on Optimizations for DSP and Embedded Systems - ODES ’13. 10th Workshop on Optimizations for DSP and Embedded Systems, Shenzen, China, Non-EU. ACM. https://doi.org/10.1145/2443608.2443611
    Project: EPICOpt (2009–2013)
  • CASM: Implementing an Abstract State Machine based programming language / Lezuo, R., Barany, G., & Krall, A. (2013). CASM: Implementing an Abstract State Machine based programming language. In Software Engineering 2013, Workshopband, (inkl. Doktorandensymposium) (pp. 75–90). GI-Edition - Lecture Notes in Informatics (LNI). http://hdl.handle.net/20.500.12708/54693
    Project: C3Pro (2010–2015)
  • Using the CASM language for simulator synthesis and model verification / Lezuo, R., & Krall, A. (2013). Using the CASM language for simulator synthesis and model verification. In Proceedings of the 2013 Workshop on Rapid Simulation and Performance Evaluation Methods and Tools - RAPIDO ’13. RAPIDO’13, Berlin, EU. https://doi.org/10.1145/2432516.2432522
    Project: C3Pro (2010–2015)

2012

2011

2010

2009

  • 08441 Final Report -- Emerging Uses and Paradigms for Dynamic Binary Translation / Altman, E., Childers, B. R., Cohn, R., Davidson, J., Brosschere, K. D., Sutter, B. D., Ertl, M. A., Franz, M., Gu, Y., Hauswirth, M., Heinz, T., Hsu, W.-C., Knoop, J., Krall, A., Kumar, N., Maebe, J., Muth, R., Rival, X., Rohou, E., … Vick, C. (2009). 08441 Final Report -- Emerging Uses and Paradigms for Dynamic Binary Translation. In Emerging Uses and Paradigms for Dynamic Binary Translation (No. 08441). Schloss Dagstuhl - Leibniz-Zentrum für Informatik. https://doi.org/10.4230/DagSemProc.08441.2
    Project: ALL-TIMES (2007–2010)
  • Progressive spill code placement / Ebner, D., Scholz, B., & Krall, A. (2009). Progressive spill code placement. In Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems - CASES ’09. International Conference on Compilers, Architecture and Synthesis for Embedded Systems [CASES 07], Salzburg, Austria, Austria. https://doi.org/10.1145/1629395.1629408
  • Fast and Accurate Simulation Using the LLVM Compiler Framework / Brandner, F., Fellnhofer, A., Krall, A., & Riegler, D. (2009). Fast and Accurate Simulation Using the LLVM Compiler Framework. In S. Niar, R. Leupers, & O. Temam (Eds.), 1st Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (p. 6). http://hdl.handle.net/20.500.12708/53601
  • Stack allocation of objects in the CACAO virtual machine / Molnar, P., Krall, A., & Brandner, F. (2009). Stack allocation of objects in the CACAO virtual machine. In B. Stephenson & C. W. Probst (Eds.), Proceedings of the 7th International Conference on Principles and Practice of Programming in Java - PPPJ ’09. https://doi.org/10.1145/1596655.1596680

2008

  • Generalized instruction selection using<i>SSA</i>-graphs / Ebner, D., Brandner, F., Scholz, B., Krall, A., Wiedermann, P., & Kadlec, A. (2008). Generalized instruction selection usingSSA-graphs. In Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems - LCTES ’08. ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems, Ottawa, Canada, Non-EU. ACM - Association for Computing Machinery. https://doi.org/10.1145/1375657.1375663
  • Optimizations for Object-Oriented Languages / Krall, A., & Horspool, N. (2008). Optimizations for Object-Oriented Languages. In Y. N. Srikant & P. Shankar (Eds.), The COMPILER DESIGN Handbook: Optimizations and Machine Code Generation (second edition) (pp. 13-1-13–29). CRC Press. http://hdl.handle.net/20.500.12708/26197
  • Dynamic Binary Translation for Generation of Cycle Accurate Architecture Simulators / Fellnhofer, A., Krall, A., & Riegler, D. (2008). Dynamic Binary Translation for Generation of Cycle Accurate Architecture Simulators. Emerging Uses and Paradigms for Dynamic Binary Translation, Schloss Dagstuhl, EU. http://hdl.handle.net/20.500.12708/84821

2007

  • Ultra Fast Cycle-Accurate Compiled Emulation of Inorder Pipelined Architectures / Farfeleder, S., Krall, A., & Horspool, N. (2007). Ultra Fast Cycle-Accurate Compiled Emulation of Inorder Pipelined Architectures. The Journal of Systems Architecture: Embedded Software Design, 53(8), 501–510. https://doi.org/10.1016/j.sysarc.2006.11.003
  • Adaptive inlining and on-stack replacement in the CACAO virtual machine / Steiner, E., Krall, A., & Thalinger, C. (2007). Adaptive inlining and on-stack replacement in the CACAO virtual machine. In L. Veiga (Ed.), Proceedings of the 5th international symposium on Principles and practice of programming in Java  - PPPJ ’07. ACM International Conference Proceeding Series. https://doi.org/10.1145/1294325.1294356
  • Instruction Set Encoding Optimization for Code Size Reduction / Med, M., & Krall, A. (2007). Instruction Set Encoding Optimization for Code Size Reduction. In H. Blume, G. Gaydadjiev, J. Glossner, & P. Knijnenburg (Eds.), 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation. IEEE. https://doi.org/10.1109/icsamos.2007.4285728
  • Leveraging Predicated Execution for Multimedia Processing / Ebner, D., Brandner, F., & Krall, A. (2007). Leveraging Predicated Execution for Multimedia Processing. In S. Samarjit Chakraborty (Ed.), 2007 IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia. IEEE. https://doi.org/10.1109/estmed.2007.4375809
  • Compiler generation from structural architecture descriptions / Brandner, F., Ebner, D., & Krall, A. (2007). Compiler generation from structural architecture descriptions. In A. Donlin (Ed.), Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems  - CASES ’07. ACM. https://doi.org/10.1145/1289881.1289886

2006

2005

2004

  • A Scalable DSP Core for SoC Applications / Panis, C., Hirnschrott, U., Krall, A., Farfeleder, S., Laure, G., Lazian, W., & Nurmi, J. (2004). A Scalable DSP Core for SoC Applications. In Proceedings of the International Symposium on System-On-Chip (SOC’04) (pp. 85–88). IEEE. http://hdl.handle.net/20.500.12708/50988

 

2025

2024

  • Atomic instruction and cache-support for VADL / Himmelbauer, S. (2024). Atomic instruction and cache-support for VADL [Diploma Thesis, Technische Universität Wien]. reposiTUm. https://doi.org/10.34726/hss.2024.113945
    Download: PDF (2.53 MB)

2023

  • Optimised processor simulation with VADL / Mihaylov, H. (2023). Optimised processor simulation with VADL [Diploma Thesis, Technische Universität Wien]. reposiTUm. https://doi.org/10.34726/hss.2023.102629
    Download: PDF (687 KB)

2022

2021

2020

2019

  • Generational and parallel garbage collection / Inführ, D. (2019). Generational and parallel garbage collection [Diploma Thesis, Technische Universität Wien]. reposiTUm. https://doi.org/10.34726/hss.2019.62350
    Download: PDF (786 KB)

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

  • Code optimizations for digital signal processors / Eckstein, E. (2003). Code optimizations for digital signal processors [Dissertation, Technische Universität Wien]. reposiTUm. https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-12005
    Download: PDF (6.85 MB)
  • An optimizing high-level linker / Wögerer, P. (2003). An optimizing high-level linker [Diploma Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/183632

2002

2001

  • DSP compiler optimization / Hirnschrott, U. (2001). DSP compiler optimization [Diploma Thesis, Technische Universität Wien]. reposiTUm. http://hdl.handle.net/20.500.12708/179676

 

  • Heinz Zemanek Preis
    1987 / Austria / Website

Soon, this page will include additional information such as reference projects, activities as journal reviewer and editor, memberships in councils and committees, and other research activities.

Until then, please visit Andreas Krall’s research profile in TISS .